1 | ISLPED 2025 Detailed Program | |||||
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2 | From | To | ||||
3 | Wednesday August 6 | |||||
4 | 7:30 | 8:00 | Registration | |||
5 | 8:00 | 8:30 | Welcome | General Co-chairs and TPC Co-chairs | ||
6 | 8:30 | 9:30 | Keynote: Michaela Blott, AMD, "Enabling the AI Revolution" | |||
7 | 9:30 | 9:50 | Coffee Break | |||
8 | 9:50 | 11:10 | Session 1A: "Energy Efficient Computing and Storage" | Frank K. Gurkaynak | Session 1B: "Next-Gen EDA: Physical Design Optimization and AI-Driven Methodologies" | Francesco Regazzoni |
9 | Partial-Sum Quantization Based on Pseudo-Quantization Noise for Variation-Tolerant Analog In-Memory Computing BEST PAPER CANDIDATE | Nameun Kang, EunHyeok Park, Sangsu Park, Jongil Kim, Jaeyun Yi, Jae-Joon Kim | Simultaneous Optimization of Placement Legalization and Multi-bit Flip-flop Allocation in Physical Design Automation | Seoyoung Bang, Taewhan Kim | ||
10 | An Analog Multiplier Utilizing an Unconventional Bit-Weighting Scheme with Application to Neural Network Quantization | Mehdi Kamal, Massoud Pedram | Development of a Physics-Informed Neural Network Model for Rapid Power Integrity Analysis in Die-Level and Die-Package Co-Design for 2.5-D Chiplet Solutions | Xi Chen, Yuhao Ju, Jie Gu | ||
11 | LoRASensE: Learnable Low-Rank Acquisition in Sensors for Efficient Edge Machine Vision | Yiwen Liang, Zhiqiang Yi, Tianrui Ma, Weidong Cao | GenSoC: A Multi-Agent-Assisted SoC Generation Methodology Leveraging Open-Source Hardware BEST PAPER CANDIDATE | Peiran Yan, Qinzhe Zhi, Lifeng Liu, Tianyu Jia | ||
12 | AdaGray: An Energy-Efficient Adaptive Gray-Code Strategy for QLC Flash-Memory Storage Systems | Han-Yu Liao, Jen-Wei Hsieh, Yi-Shen Chen, Chang-Lin Tsai, Yuan-Hao Chang | Timing-Driven Macro Placement with Connectivity-Aware Clustering | Gangmin Jeon, Heechun Park | ||
13 | 11:10 | 12:40 | Special Session 1: "Cold War: Don't Close Your Eyes on Temperature" | Mircea Stan | Special Session 2: "Neuromorphic Edge Computing: Challenges, Opportunities, and Current Solutions" | Federico Corradi, Farhad Merchant |
14 | Power Map Characterization and Modeling for Commercial CPU/GPUs Considering Temperature Dependence | Jincong Lu, Sachin Sachdeva, Haotian Lu, Sheldon X.-D. Tan | Dynamic Neuromorphic Processing for Energy-Efficient Cognitive Sensing | Amir Zjajo | ||
15 | Thermal Aware Design Methodologies for System On Chip Application Processor | Youngsang Cho, Jun So Pak, Seungwook Yoon, Ilryong Kim | Harnessing Sparsity for Low-Power Event-Driven Computing at the Edge | Orlando Moreira | ||
16 | Thermal Challenges and Opportunities for Off-the-shelf 3D-stacked CPUs | Jae Yoon Lee, Chae Young Sim, Seung Hun Choi, Sung Woo Chung | Reliable and Low-Power Neuromorphic Computing | Miloš Krstić | ||
17 | Transistor-to-GDS Reliability Analysis in Sub-3nm: Impact of Self-Heating and Aging on Timing | Swati Deshwal, Hadi Nour Eddine, Mahdi Benkhelifa, Albi Mema, Yogesh S. Chauhan, Hussam Amrouch | Low-Power Neuromorphic Systems: Mixed-Signal Design and Computing-in-Memory for Edge AI | Farhad Merchant, Federico Corradi | ||
18 | 12:40 | 14:10 | Lunch | |||
19 | 14:10 | 15:30 | Session 2A: "Brains on a Budget – Smart, Small, and Power-Efficient" | Hussam Amrouch | Session 2B: "Next-Gen Edge AI: Flash Memory, RISC-V, and Hybrid Architectures" | Thierry Tambe |
20 | Exploration of Low-Power Flexible Stress Monitoring Classifiers for Conformal Wearables | Florentia Afentaki, Sri Sai Rakesh Nakkilla, Konstantinos Balaskas, Paula Carolina Lozano Duarte, Shiyi Jiang, Georgios Zervakis, Farshad Firouzi, Krishnendu Chakrabarty, Mehdi Tahoori | E-Flash: Energy-Efficient DNN Mapping on NAND Flash Memory with State-Switching Algorithm BEST PAPER CANDIDATE | Gisan Ji, Sanghun Shin, Jangho Baik, Wonbo Shim, Sungju Ryu | ||
21 | ASAP-FE: Energy-Efficient Feature Extraction Enabling Multi-Channel Keyword Spotting on Edge Processors | Jongin Choi, Jina Park, Jae-Jin Lee, Massoud Pedram and Woojoo Lee | Hybrid Systolic Array Accelerator with Optimized Dataflow for Edge Large Language Model Inference | Chun-Ting Chen, HanGyeol Mun, Jian Meng, Mohamed Abdelfattah and Jae-sun Seo | ||
22 | Minimizing Redundant Checkpoint Triggers for Efficient Intermittent Systems BEST PAPER CANDIDATE | Youngbin Kim, Yoojin Lim | ID-VSA: Independent and Dynamic Vector Symbolic Architecture for Energy-Efficient Edge AI | Mehran Shoushtari Moghadam, Abu Kaisar Mohammad Masum, Sercan Aygun, M. Hassan Najafi | ||
23 | AridWalk: Efficient Graph Random Walks on a Resource-Limited Computational Storage Device | Liang-Chi Chen, Chien-Chung Ho, Tei-Wei Kuo, Yuan-Hao Chang | RIMIX: RISC-V Core with MIXed-Precision SIMD Instruction Extensions Supported by Oracle-Assisted Sub-Network Search for Efficient TinyML | Jiyong Park, Dahoon Park, Yeeun Hong, Jaeha Kung | ||
24 | 15:30 | 16:00 | Coffee Break | |||
25 | 16:00 | 17:30 | Panel 1: "Workforce Development in the Era of AI" | Organizers: Kahty Hoover, Priyadarshini Panda Panelists: Michaela Blott, Chaitali Chakrabarti, Suman Datta, Vivek De, Sree Menon, Kaushik Roy | ||
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28 | Thursday August 7 | |||||
29 | 7:30 | 8:00 | Registration | |||
30 | 8:00 | 9:00 | Keynote: Kenichi Okada, Institute of Science Tokyo, "Synthesizable Analog Circuit Design Using Digital Standard Cell" | |||
31 | 9:00 | 9:30 | Coffee Break | |||
32 | 9:30 | 10:50 | Session 3A: "Accelerators for LLM and Edge AI Applications" | M. Hassan Najafi | Session 3B: "Twisting AI and Hardware in 3D" | Bokyung Kim |
33 | Accelerating LLM Inference with Flexible N:M Sparsity via A Fully Digital Compute-in-Memory Accelerator BEST PAPER CANDIDATE | Akshat Ramachandran, Souvik Kundu, Arnab Raha, Shamik Kundu, Deepak K. Mathaikutty, Tushar Krishna | MIX-3D: AI-based Architecture-Circuit Co-design Methodology for Mixed-Node, Mixed-Area 3D ICs | Min Gyu Park, Doyun Kim, Sung Kyu Lim | ||
34 | A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators – Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation – | Quan Cheng, Huizi Zhang, Qiufeng Li, Yuan Liang, Mingtao Zhang, Zhenzhe Chen, Ruilin Zhang, Jinjun Xiong, Mingqiang Huang, Longyang Lin, Masanori Hashimoto | GAVINA: flexible aggressive undervolting for bit-serial mixed-precision DNN acceleration | Jordi Fornt, Pau Fontova-Musté, Adrian Gras, Omar Lahyani, Martí Caro, Jaume Abella, Francesc Moll Echeto, Josep Altet | ||
35 | FLASH-D: FlashAttention with Hidden Softmax Division | Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos | An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems | Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst | ||
36 | A Compact, Low Power Transprecision ALU for Smart Edge Devices | Ayushi Dube, Gian Singh, Sarma Vrudhula | MemRaptor: Magnetoresistive Array as Matrix Vector Multiplication and Transcendental Function Operator for NLP Applications | Dong Eun Kim, Tanvi Sharma, Anushka Mukherjee, Mainakh Mukherjee and Kaushik Roy | ||
37 | 10:50 | 12:20 | Tutorial 1: "The Energy Cost of Privacy and Security" | Francesco Regazzoni | Tutorial 2: "Autonomy with Neuromorphic System" | Saibal Mukhopadhyay |
38 | Introduction to Security Primitives and Privacy Preserving Technologies | Paolo Palmieri | Neuromorphic Circuits | Amit Trivedi | ||
39 | Energy Assessment of Security Primitives | Ayse Kivilcim Coskun | Neuromorphic and Hybrid Computing Models | Priya Panda | ||
40 | Energy Efficient Design and Implementation of Security Primitives | Francesco Regazzoni | Algorithms for Neuromorphic Sensing Systems | Saibal Mukhopadhyay | ||
41 | Neuromorphic Approach to End-to-end Navigation | Kaushik Roy | ||||
42 | 12:20 | 13:50 | Lunch | |||
43 | 13:50 | 15:50 | Posters and Design Contest Demos with Coffee | |||
44 | Posters | Design Contest Demos | ||||
45 | On-chip Integrated Voltage Regulators: Frontside, Backside, or Off-Chip? | Amaan Rahman, Seungmin Woo, Zheng Yang, Sung Kyu Lim | A Sub-10Hz Sub-nW 65nm CMOS Timer with Voltage-Stacking of an Oscillator and Frequency Dividers for Small-Formfactor Scaling-Friendly IoTs | You Wu, Kei Awano, Hiroaki Kitaike, Kiichi Niitsu | ||
46 | J3DAI: A tiny DNN-Based Edge AI Accelerator for 3D-Stacked CMOS Image Sensor | Benoit Tain, Raphael Millet, Romain Lemaire, Michal Szczepanski, Laurent Alacoque, Emmanuel Pluchart, Sylvain Choisnet, Rohit Prasad, Jerome Chossat, Pascal Pierunek, Pascal Vivet, Sebastien Thuries | ECO: Low Power Context-Aware Multimodal AI on NPUs | Arghadip Das, Yatharth Agarwal, Arnab Raha, Soumendu Ghosh, Vijay Raghunathan | ||
47 | MTA-Coded PAM-4 Receiver with Decision Feedback Power Saving Scheme and Partial DFE for Low-Power Memory Interfaces | Jusung Lee, Younghwan Chang, Jaekwang Yun, Sanghyuk Seo, Yong-Un Jeong, Suhwan Kim | Radar-PIM-Lite: Ultra-Low-Power PIM Processor for Real-Time UWB Radar Respiration Detection on UAVs | Kyeongwon Lee, Hyunseok Kwak, Kyeongpil Min, Chaebin Jung, Sangmin Jeon, Woojoo Lee, Jina Park, Massoud Pedram | ||
48 | A High-Performance Dataflow-Based ORB Extractor Accelerator for SLAM | Rui Xue, Wenming Li, Haibin Wu, Cheng Guo, Yi Li, Xiaochun Ye, Dongrui Fan | A Low-Power Real-Time Hardware Accelerator for Edge Detection Using Stochastic Computing | Priyajit Ghosh, Rajarshi Mukherjee, Auro Anand Saha, Sutirtha Naha, Arghadip Das, Arnab Raha, Mrinal K Naskar | ||
49 | Jack Unit: An Area- and Energy-Efficient Multiply-Accumulate (MAC) Unit Supporting Diverse Data Formats | Seock-Hwan Noh, Sungju Kim, Seohyun Kim, Daehoon Kim, Jaeha Kung, Yeseong Kim | ||||
50 | Repurpose Accel-Sim for Next Generation NVIDIA Jetson GPU Architectural Design | Tianhao Huang, Lingyu Sun, Chao Li, Xiaofeng Hou, Yaqian Zhao, Jingwen Leng, Li Li, Minyi Guo | ||||
51 | ML-Power: Machine Learning based Power Estimation for SoCs | Sujay Pandit, Sujit Dey, Anand Raghunathan | ||||
52 | Diffusion-Enhanced Graph Transformer with Reinforcement Learning for Transferable Analog Circuit Optimizer | Ho-Jin Lee, Kyeong-Jun Lee, Jaehoon Lee, Kyu-Jin Choi, Geunyong Choi, Youngchang Choi, Kyongsu Lee, Seokhyeong Kang, Jae-Yoon Sim | ||||
53 | SHIFT ECC: A Value Converting HBM ECC Approach for Refresh Energy Efficient Integer Quantized DNN Inference | Jae Yoon Lee, Young Seo Lee, Young-Ho Gong, Seon Wook Kim, Sung Woo Chung | ||||
54 | Optimizing Heterogeneous Compute-in-Memory with Hybrid Dataflow and In-Network Reduction for Vision Transformer | Zexin Fu, Yihang Zuo, Yuzhe Ma, Jiayi Huang | ||||
55 | Revisiting Reconfigurable Acceleration of Vision Transformer with Patch Pruning | Hanning Chen, Yang Ni, Wenjun Huang, Hyunwoo Oh, Tamoghno Das, Fei Wen, Mohsen Imani | ||||
56 | TEE-SFL: Time and Energy-efficient solution for addressing communication heterogeneity in Split Federated Learning Schemes | Ziyi Zhao, Qifeng Chen, Jingtao Li, Deliang Fan, Chaitali Chakrabarti | ||||
57 | MEbots: Integrating a RISC-V Virtual Platform with a Robotic Simulator for Energy-aware Design | Giovanni Pollo, Mohamed Amine Hamdi, Matteo Risso, Lorenzo Ruotolo, Pietro Furbatto, Matteo Isoldi, Yukai Chen, Alessio Burrello, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari, Sara Vinco | ||||
58 | Enhancing Low-Precision Deep Learning: A Posit8 Framework for Energy Efficient DNN Training | Dongyang Wu, Mehdi Kamal, Massoud Pedram | ||||
59 | Towards Zero-Stall Matrix Multiplication on Energy-Efficient RISC-V Clusters for Machine Learning Acceleration | Luca Colagrande, Lorenzo Leone, Maximilian Coco, Andrei Deaconeasa, Luca Benini | ||||
60 | Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning | Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst | ||||
61 | SITRA: Exploiting Temporal Silence in Spiking Transformers for Fast & Energy-efficient Inference | Abhiroop Bhattacharjee, Abhishek Moitra, Ruokai Yin, Priyadarshini Panda | ||||
62 | DIRC-RAG: Accelerating Edge RAG with Robust High-Density and High-Loading-Bandwidth Digital In-ReRAM Computation | Kunming Shao, Zhipeng Liao, Jiangnan Yu, Liang Zhao, Qiwei Li, Xijie Huang, Jingyu He, Fengshi Tian, Yi Zou, Xiaomeng WANG, Tim Cheng, Chi Ying Tsui | ||||
63 | upGEMV: A Bandwidth-Efficient and Scalable GEMV Accelerator for PIM Systems | Fan Yang, Shunchen Shi, Peiheng Zhang, Xueqi Li | ||||
64 | Can Photonic Interconnects be used for High-Throughput Memory Access in FHE Accelerators? | Dewan Saiham, Mariam Rabadi, Di Wu, Sazadur Rahman | ||||
65 | Sustainably Secure: ChaCha20 Encryption Based on In-Memory Compute | Samridhi Jain, Mohd Aamir, Anuj Grover | ||||
66 | 15:50 | 17:20 | Panel 2: "30 Years of ISLPED" | Organizer: Massoud Pedram | ||
67 | 18:30 | 21:00 | Banquet | |||
68 | ||||||
69 | Friday August 8 | |||||
70 | 8:00 | 9:00 | Keynote 3: Brucek Khailany, Nvidia, "From VLSI through Software: Optimizing the Computing Stack for Generative AI" | |||
71 | 9:00 | 9:30 | Coffee Break | |||
72 | 9:30 | 10:50 | Session 4A: "Precision, Performance, and Efficiency: Modern Strategies in ML systems" | Donghwa Shin | Session 4B: "Compute-in-Memory Macros" | Jaehyun Park |
73 | Faster Ternary and Binary Neural Network Inference on CPU by Reducing Popcount Overhead BEST PAPER CANDIDATE | Olivier Fischer, Shien Zhu, Gustavo Alonso | CAM-CIM: A Hybrid Compute-in-Memory Using Content-Addressable Memory with Subword Split Mapping for Reduced ADC Resolution | Sangwoo Jung, Hojin Lee, Yejin Lee, Jiyong Park, Dahoon Park, Hyunseob Shin, Jong-Hyeok Yoon, Jaeha Kung | ||
74 | ECLIP: Energy-efficient and Practical Co-Location of ML Inference on Spatially Partitioned GPUs | Ryan Quach, Yidi Wang, Ali Jahanshahi, Daniel Wong, Hyoseung Kim | A 20.98TOPS/W Energy-Efficient Binary BERT Model on Group Vector Systolic CIM Accelerator | Dingbang Liu, Ziyi Guan, Qilong Chen, Jingyun Gu, Jiaqi Yang, Kai Li, Wei Mao, Ngai Wong, Changwen Chen, Hao Yu | ||
75 | SmartMS: Efficient Hierarchical Database Search for Mass Spectrometry | Flavio Ponzina, Sumukh Pinge, Zheyu Li, Abhijay Deevi, Yilin Ge, Mingu Kang, Tajana Rosing | Cost-efficient Processing-in-Memory Architecture with Training-free and Universal Error Compensation BEST PAPER CANDIDATE | MyeongJi Yun, Jung Gyu Min, Sein Oh, Jiwoung Choi, Minkyu Je, Jang-Sik Lee, Youngjoo Lee | ||
76 | TruncQuant: Truncation-Ready Quantization for DNNs with Flexible Weight Bit Precision | Jinhee Kim, Seoyeon Yoon, Taeho Lee, Joo Chan Lee, Kang Eun Jeon, Jong Hwan Ko | Design Techniques for Ultra-low Power Cryogenic CMOS for Quantum Computing Applications (Industry) | Sudipto Chakraborty, Pat Rosno, John Bulzacchelli, David Frank, Rajiv Joshi, Daniel Friedman | ||
77 | 10:50 | 12:10 | Session 5A: "Transceivers and Stochastic Logic Design" | Alexandre Levisse | Session 5B: "Emerging Technologies for Secure and Efficient Computing" | TBD |
78 | A Spectral-Efficient Low-Power NRZ/PAM-4 Dual-Mode Wireline Transmitter for Multidrop Interfaces | Donggeon Kim, Kiarash Gharibdoust, Armin Tajalli, Kyungtae Lee, Gain Kim | DPIMA: A DRAM-Based Processing-in-Memory Accelerator for Privacy-Preserving Machine Learning BEST PAPER CANDIDATE | Bokyung Kim | ||
79 | Energy-Efficient Single-Ended Capacitive PAM-4 Transceiver for Next-Generation HBM Interfaces | Jaeyoon Kim, Sangyoon Lee, Jaekwang Yun, Sanghyuk Seo, Kwangyeon Lee, Yong-Un Jeong, Suhwan Kim | QuAKE: Speeding up Model Inference Using Quick and Approximate Kernels for Exponential Non-Linearities | Sai Kiran Narayanaswami, Gopalakrishnan Srinivasan, Ravindran Balaraman | ||
80 | Always-On Sensing in Energy-Harvested Systems via Stochastic Intermittent Computing | Sepehr Tabrizchi, Mehran Shoushtari Moghadam, Ali Shafiee Sarvestani, Sercan Aygun, M. Hassan Najafi, Arman Roohi | Meta-Heuristic Optimization of Karatsuba Multiplier Designed ECC Processor | Pruthvi Parate, Daksh Sharma, Alwin Shaju, Vasanthi D R, Madhav Rao | ||
81 | Design of a correlation-insensitive HFQ stochastic adder by local two-phase clocking | Yuki Matsumoto, Masamitsu Tanaka, Takatsugu Ono | Unicorn-CIM: Unconvering the Vulnerability and Improving the Resilience of High-Precision Compute-in-Memory | Qiufeng Li, Yiwen Liang, Weidong Cao | ||
82 | 12:10 | 12:40 | Closing Remark and Award Ceremony | General Co-chairs |