Double Trouble Spartan-6 Ballouts

	A	B	C	D	E	F	G	H	I	J	K	L	M	N	O	P	Q	R	S	T	U	V	W	X	Y	Z	AA	AB	AC	AD	AE	AF	AG	AH	AI	AJ	AK	AL	AM	AN
1					DiD12	DiD11	DiD10	DiD9	DiD8	DiD7	DiD6	DiD5	DiD4	DiD3	DoC0	DiD2	DiD1	DoT1	DoT0	DiD0	DiC0	DiC1	CiD0	CiD1	CiC1	CiC0	CiD3	CiD2	CiD5	CiD4	CiD6	CiD8	CiD7	CiD10	CiD9	CiD11	CiD12	AoT0	AoT1	AoC0
2					DiD9	DiD10	DiD11	DiD12	DiD5	DiD6	DiD7	DiD8	DiD2	DoC0	DiD3	DiD4	DiD0	DoT0	DoT1	DiD1	CiD1	CiD0	DiC1	DiC0	CiD2	CiD3	CiC0	CiC1	CiD8	CiD6	CiD4	CiD5	CiD11	CiD9	CiD10	CiD7	AoC0	AoT1	AoT0	CiD12
3
4		AB	AA	Y	W	V	U	T	R	P	N	M	L	K	J	H	G	F	E	D	C	B	A
5	22		2		1	1	1	1	1	1	1	1	DoT1	1	*DiC0_rep	*CiC1_x	1	1	1	1	1	1		22		Bank1_XX	1	42							input channel	data	10	i	XiD0~9
6	21	2	2	2		DiD9		DiD6		DiD3		DiD1		DiD0		*CiC1		CiD3		CiD6		CiD9	1	21		Bank1_XX	1	40								ncmd	1	i	XiD10
7	20	2	2		DiD10	1	DiD8	1	DiD4	DiT1	DiD2	*DiC1	DoT0	*CiC0	*DiC0	DoD4	CiD1	1	CiD4	1	CiD8	1	CiD10	20												clk	1	i	XiC0, XiC0_dup
8	19	2		2		2	DiD7	DiD5	1	DoC0	1	DiT0	*DiC1_x	*CiC0_rep	1	DoD3	CiD0	1		CiD5	CiD7			19												clk	2	i	XiC1, XiC1_X
9	18	2	2	2	2	2		2		DoD10		1		1		1		CiD2				BoD10	0	18		Bank0_XX	0	34								token	2	o	XiT0~1
10	17	2		2	2	2	2	2		DoD9		DoD8	DoD6	DoC1_x	DoC1	1	1	1		CiT1	BoD9		0	17		Bank0_XX	0	34
11	16	2	2				2	2	2		1	DoD7		DoD5	1	DoD2	DoD1	DoD0	CiT0		0	BoD8	0	16
12	15	2		2		2	2	2	2				1					0		BoD7	BoD6		0	15											output channel	data	10	o	XoD0~9
13	14	2	2	2	2		2	2								0		BoD5	BoD4	BoC1	BoC1_x	BoD3	0	14		Bank3_XX	3	42								ncmd	1	o	XoD10
14	13	*2		*2	2	2	2		2							BoD2	0	BoD1		0	BoC0		0	13		Bank3_XX	3	46								clk	1	o	XoC0, XoC0_dup
15	12	*XG9	*XG8	*ASIC_SMA_OUT_N	*ASIC_SMA_OUT_P											BoT0		BoT1	BoD0	0	*CLK_0_n	*clk0	*clk90	12															XoC1, XoC1_X
16	11	*ASIC_SMA_IN_N		*ASIC_SMA_IN_P	2	XG1		2	XG0							0	AoD10			*CLK_0_p	*CLK_1_p		*CLK_1_p	11		Red letter: P pin										token	2	i	XoT0~1
17	10	2	2	2	2											0		AoC1_x	AoC1	AoT0	AoT1	*MSTR_SDO_CLK	*PLL_CLK_i	10		Under line: Termination
18	9	2		2	XG4	2	XG3		XG2								AoD0	0		AoD3	AoD1		0	9
19	8	2	2	2	XG5				2	CoC0		CoT1		3		3	AoD2	0	AoC0	0	0	AoD4	0	8		GCLK	*
20	7	2		2		2		XG6	2	3	3	CoT0		CoD4	CoD6		CoD9	3		AoD5	AoD6		0	7
21	6	2	2				XG7	T6		CoD0	CoD1	CoD2	3	CoD5	3	CoD7	CoD10		AiT1	AoD7	0	AoD8	0	6		Attention: In Double trouble v1.0 DiT1 is at N19
22	5					2		T5		3		CoD2		*AiC0		3		3	AiT0	AiD5	AoD9		0	5		But in Double trouble v1.2 DiT1 is at P20
23	4	2	2	2	2		BiD6	BiD4	BiD2	3	3	3	*BiC0_rep	*AiC0_rep	*AiC1_x	CoD8	AiD1		3		3		0	4
24	3	2		2	BiD9	3	BiD7	3	BiD3	BiD0	CoC1	*BiC0	3	*AiC1	*BiC1	3	AiD2	3	AiD4	AiD6	AiD8	3	0	3
25	2	ASIC_LED0	ASIC_LED1	BiD10		BiD8		BiD5		BiD1		BiT0		3		AiD0		AiD3		AiD7		AiD9	AiD10	2
26	1			3	3	3	3	3	3	3	CoC1_x	BiT1	3	3	*BiC1_x	3	3	3	3	3	3	3		1
27		AB	AA	Y	W	V	U	T	R	P	N	M	L	K	J	H	G	F	E	D	C	B	A
28
29					BiD12	BiD11	BiD10	BiD9	BiD8	BiD7	BiD6	BiD5	BiD4	BiD3	BiD2	BiC0	BiD1	BiC1	BiD0	CoT0	AiC0	AiC1	CoC0	CoT1	AiD1	AiD0	AiD3	AiD2	AiD4	AiD6	AiD5	AiD9	AiD8	AiD10	AiD7	AiD11	AiD12	BoC0	BoT0	BoT1
30
31				(I believe this is a through-the-board look.)
32			Assuming T6 and T5 are both taken by ASIC_FG_FCS_B signal and resistors
33
34			Bank 2 = 3.3V (XG pins are 3.3V; ASIC FPGA ran out of ASIC IO voltage pins)
35			Bank 0,1,3 = ASIC IO voltage