Double Trouble Spartan-6 Ballouts
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ABCDEFGHIJKLMNOPQRSTUVWXYZAAABACADAEAFAGAHAIAJAKALAMAN
1
DiD12
DiD11
DiD10
DiD9DiD8DiD7DiD6DiD5DiD4DiD3DoC0DiD2DiD1DoT1DoT0DiD0DiC0DiC1CiD0CiD1CiC1CiC0CiD3CiD2CiD5CiD4CiD6CiD8CiD7CiD10CiD9CiD11CiD12AoT0AoT1AoC0
2
DiD9
DiD10
DiD11
DiD12
DiD5DiD6DiD7DiD8DiD2DoC0DiD3DiD4DiD0DoT0DoT1DiD1CiD1CiD0DiC1DiC0CiD2CiD3CiC0CiC1CiD8CiD6CiD4CiD5CiD11CiD9CiD10CiD7AoC0AoT1AoT0CiD12
3
4
ABAAYWVUTRPNMLKJHGFEDCBA
5
22211111111DoT11
*DiC0_rep
*CiC1_x
11111122
Bank1_XX
142
input channel
data10iXiD0~9
6
21222DiD9DiD6DiD3DiD1DiD0*CiC1CiD3CiD6CiD9121
Bank1_XX
140ncmd1iXiD10
7
2022
DiD10
1DiD81DiD4DiT1DiD2
*DiC1
DoT0*CiC0
*DiC0
DoD4CiD11CiD41CiD81CiD1020clk1i
XiC0, XiC0_dup
8
19222DiD7DiD51DoC01DiT0
*DiC1_x
*CiC0_rep
1DoD3CiD01CiD5CiD719clk2i
XiC1, XiC1_X
9
18222222
DoD10
111CiD2
BoD10
018
Bank0_XX
034token2oXiT0~1
10
17222222DoD9DoD8DoD6
DoC1_x
DoC1111CiT1BoD9017
Bank0_XX
034
11
16222221DoD7DoD51DoD2DoD1DoD0CiT00BoD8016
12
1522222210BoD7BoD6015
output channel
data10oXoD0~9
13
142222220BoD5BoD4BoC1
BoC1_x
BoD3014
Bank3_XX
342ncmd1oXoD10
14
13*2*22222BoD20BoD10BoC0013
Bank3_XX
346clk1o
XoC0, XoC0_dup
15
12*XG9*XG8
*ASIC_SMA_OUT_N
*ASIC_SMA_OUT_P
BoT0BoT1BoD00
*CLK_0_n
*clk0*clk9012
XoC1, XoC1_X
16
11
*ASIC_SMA_IN_N
*ASIC_SMA_IN_P
2XG12XG00
AoD10
*CLK_0_p
*CLK_1_p
*CLK_1_p
11
Red letter: P pin
token2iXoT0~1
17
1022220
AoC1_x
AoC1AoT0AoT1
*MSTR_SDO_CLK
*PLL_CLK_i
10
Under line: Termination
18
922XG42XG3XG2AoD00AoD3AoD109
19
8222XG52CoC0CoT133AoD20AoC000AoD408
GCLK
*
20
7222XG6233CoT0CoD4CoD6CoD93AoD5AoD607
21
622XG7T6CoD0CoD1CoD23CoD53CoD7
CoD10
AiT1AoD70AoD806
Attention: In Double trouble v1.0 DiT1 is at N19
22
52T53CoD2*AiC033AiT0AiD5AoD905But in Double trouble v1.2 DiT1 is at P20
23
42222BiD6BiD4BiD2333
*BiC0_rep
*AiC0_rep
*AiC1_x
CoD8AiD13304
24
322BiD93BiD73BiD3BiD0CoC1*BiC03*AiC1*BiC13AiD23AiD4AiD6AiD8303
25
2
ASIC_LED0
ASIC_LED1
BiD10
BiD8BiD5BiD1BiT03AiD0AiD3AiD7AiD9AiD102
26
13333333
CoC1_x
BiT133
*BiC1_x
33333331
27
ABAAYWVUTRPNMLKJHGFEDCBA
28
29
BiD12BiD11BiD10BiD9BiD8BiD7BiD6BiD5BiD4BiD3BiD2BiC0BiD1BiC1BiD0CoT0AiC0AiC1CoC0CoT1AiD1AiD0AiD3AiD2AiD4AiD6AiD5AiD9AiD8AiD10AiD7AiD11AiD12BoC0BoT0BoT1
30
31
(I believe this is a through-the-board look.)
32
Assuming T6 and T5 are both taken by ASIC_FG_FCS_B signal and resistors
33
34
Bank 2 = 3.3V (XG pins are 3.3V; ASIC FPGA ran out of ASIC IO voltage pins)
35
Bank 0,1,3 = ASIC IO voltage
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ASIC FPGA (v1.2 Final)
ASIC FPGA (Final)
Gateway FPGA (Final)
Ignore these --->
Sheet1
Sheet2
Sheet3
Sheet4
Sheet5
Sheet6
ASIC FPGA (Old)
Gateway FPGA (Old)
<--- Ignore these