| A | B | C | D | E | |
|---|---|---|---|---|---|
1 | Notes | ||||
2 | |||||
3 | Device Utilization Summary | ||||
4 | Device Utilization Summary | Usage | Out of | % | |
5 | Slice Logic Utilization | ||||
6 | ---Number of Slice Registers | 0 | 11440 | 0.0% | |
7 | -----Number used as Flip Flops | 0 | |||
8 | -----Number used as Latches | 0 | |||
9 | -----Number used as Latch-thrus | 0 | |||
10 | -----Number used as AND/OR logics | 0 | |||
11 | ---Number of Slice LUTs | 0 | 5720 | 0.0% | |
12 | -----Number used as logic | 0 | 5720 | 0.0% | |
13 | -------Number using O6 output only | 0 | |||
14 | -------Number using O5 output only | 0 | |||
15 | -------Number using O5 and O6 | 0 | |||
16 | -------Number used as ROM | 0 | |||
17 | -----Number used as Memory | 0 | 1440 | 0.0% | |
18 | -------Number used as Dual Port RAM | 0 | |||
19 | ---------Number using O6 output only | 0 | |||
20 | ---------Number using O5 output only | 0 | |||
21 | ---------Number using O5 and O6 | 0 | |||
22 | -------Number used as Single Port RAM | 0 | |||
23 | -------Number used as Shift Register | 0 | |||
24 | ---------Number using O6 output only | 0 | |||
25 | ---------Number using O5 output only | 0 | |||
26 | ---------Number using O5 and O6 | 0 | |||
27 | -----Number used exclusively as route-thrus | 0 | |||
28 | -------Number with same-slice register load | 0 | |||
29 | -------Number with same-slice carry load | 0 | |||
30 | -------Number with other load | 0 | |||
31 | |||||
32 | Device Utilization Summary | Usage | Out of | % | |
33 | Slice Logic Distribution | ||||
34 | ---Number of occupied Slices | 0 | 1430 | 0.0% | |
35 | ---Number of MUXCYs used | 0 | 2860 | 0.0% | |
36 | ---Number of LUT Flip Flop pairs used | 0 | |||
37 | -----Number with an unused Flip Flop | 0 | 4990 | 0.0% | |
38 | -----Number with an unused LUT | 0 | 4990 | 0.0% | |
39 | -----Number of fully used LUT-FF pairs | 0 | 4990 | 0.0% | |
40 | -----Number of slice register sites lost | ||||
41 | -------to control set restrictions | 0 | 11440 | 0.0% | |
42 | |||||
43 | Device Utilization Summary | Usage | Out of | % | |
44 | Specific Feature Utilization | ||||
45 | ---Number of RAMB16BWERs | 0 | 32 | 0.0% | |
46 | ---Number of RAMB8BWERs | 0 | 64 | 0.0% | |
47 | ---Number of BUFIO2/BUFIO2_2CLKs | 0 | 32 | 0.0% | |
48 | -----Number used as BUFIO2s | 0 | |||
49 | -----Number used as BUFIO2_2CLKs | 0 | |||
50 | ---Number of BUFIO2FB/BUFIO2FB_2CLKs | 0 | 32 | 0.0% | |
51 | ---Number of BUFG/BUFGMUXs | 0 | 16 | 0.0% | |
52 | -----Number used as BUFGs | 0 | |||
53 | -----Number used as BUFGMUX | 0 | |||
54 | ---Number of DCM/DCM_CLKGENs | 0 | 4 | 0.0% | |
55 | ---Number of ILOGIC2/ISERDES2s | 0 | 200 | 0.0% | |
56 | -----Number used as ILOGIC2s | 0 | |||
57 | -----Number used as ISERDES2s | 0 | |||
58 | ---Number of IODELAY2/IODRP2/IODRP2_MCBs | 0 | 200 | 0.0% | |
59 | ---Number of OLOGIC2/OSERDES2s | 0 | 200 | 0.0% | |
60 | -----Number used as OLOGIC2s | 0 | |||
61 | -----Number used as OSERDES2s | 0 | |||
62 | ---Number of BSCANs | 0 | 4 | 0.0% | |
63 | ---Number of BUFHs | 0 | 128 | 0.0% | |
64 | ---Number of BUFPLLs | 0 | 8 | 0.0% | |
65 | ---Number of BUFPLL_MCBs | 0 | 4 | 0.0% | |
66 | ---Number of DSP48A1s | 0 | 16 | 0.0% | |
67 | ---Number of ICAPs | 0 | 1 | 0.0% | |
68 | ---Number of MCBs | 0 | 2 | 0.0% | |
69 | ---Number of PCILOGICSEs | 0 | 2 | 0.0% | |
70 | ---Number of PLL_ADVs | 0 | 2 | 0.0% | |
71 | ---Number of PMVs | 0 | 1 | 0.0% | |
72 | ---Number of STARTUPs | 0 | 1 | 0.0% | |
73 | ---Number of SUSPEND_SYNCs | 0 | 1 | 0.0% | |
74 | |||||
75 | |||||
76 | mor1kx Configuration | ||||
77 | mor1kx Features | Value | Possible Values | Notes | |
78 | p_OPTION_CPU0 | CAPPUCCINO | ? | MiSoC requires CAPPUCCINO? | |
79 | |||||
80 | Caches | ||||
81 | -Instruction Cache | ||||
82 | --p_FEATURE_INSTRUCTIONCACHE | None | Enabled / None | ||
83 | --p_OPTION_ICACHE_BLOCK_WIDTH | ||||
84 | --p_OPTION_ICACHE_SET_WIDTH | ||||
85 | --p_OPTION_ICACHE_WAYS | ||||
86 | --p_OPTION_ICACHE_LIMIT_WIDTH | 31 | MiSoC Requires 31 | ||
87 | -Data Cache | ||||
88 | --p_FEATURE_DATACACHE | None | Enabled / None | ||
89 | --p_OPTION_DCACHE_BLOCK_WIDTH | ||||
90 | --p_OPTION_DCACHE_SET_WIDTH | ||||
91 | --p_OPTION_DCACHE_WAYS | ||||
92 | --p_OPTION_DCACHE_LIMIT_WIDTH | 31 | MiSoC Requires 31 | ||
93 | |||||
94 | MMU | ||||
95 | -Instruction MMU | ||||
96 | --p_FEATURE_IMMU | Enabled | Enabled / None | Linux requires Enabled | |
97 | --p_FEATURE_IMMU_HW_TLB_RELOAD | None | Enabled / None | Too big? | |
98 | --p_OPTION_IMMU_SET_WIDTH | ||||
99 | --p_OPTION_IMMU_WAYS | ||||
100 | -Data MMU | ||||