AML-S905X-CC-V1.0A Headers
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40 Pin Header
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GPIOIR/SD/LED SideGPIO
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Ref AliasRef FunctionsPadBank PinChipLinux #Row 1Row 2Linux #ChipBank PinPadRef FunctionsRef Alias
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VCC3.3V12VCC5V
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I2C_SDA_AOI2C_SDA_AO // I2C_SLAVE_SDA_AO // UART_RX_AO_B)D13GPIOAO_50534VCC5V
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I2C_SCK_AO(I2C_SCK_AO // I2C_SLAVE_SCK_AO // UART_TX_AO_B)A10GPIOAO_40456GND
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GPIOCLK_0(CLK24 // CLK12 // CLKOUT)E9GPIOCLK_0198 (108)7891 (101)1GPIOX_12A6(UART_TX_A (long fifo) // SLIP_UART_TX)UART_A_TX
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GND91092 (102)1GPIOX_13B6(UART_RX_A // SLIP_UART_RX )UART_A_RX
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I2SOUT-CH23(AO_CEC // EE_CEC // I2SOUT_CH23 // PWM_AO_A)F17GPIOAO_8*8*111260GPIOAO_6C11(CLK_32K_IN // I2S_IN_01 // SPDIF_OUT // PWM_AO_B)PWM_F
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I2SOUT-CH45(REMOTE_OUTPUT // PWM_AO_B // I2SOUT_CH45 // SPDIF_OUT)C12GPIOAO_9091314GND
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I2SOUT-CH67(GPOAO_14 // I2SOUT_CH67)B12TEST_N**10**151693 (103)1GPIOX_14C6(UART_CTS_A // SLIP_UART_CTS)UART_A_CTS_N
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VCC3.3V171894 (104)1GPIOX_15C7(UART_RTS_A // SLIP_UART_RTS )UART_A_RTS_N
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BTPCM_DOUT(PCM_OUT_A // UART_TX_C // SPI_MOSI // TSin_SOP_A)B4GPIOX_8187 (97)1920GND
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BTPCM_DIN(PCM_IN_A // UART_RX_C // SPI_MISO // Tsin_D_VALID_A)B3GPIOX_9188 (98)212279 (89)1GPIOX_0A2(SDIO_D0)WIFI_SD_D0
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BTPCM_CLK(PCM_CLK_A // UART_RTS_C // SPI_SCLK // TSin_CLK_AC4GPIOX_11190 (100)232489 (99)1GPIOX_10C5(PCM_FS_A // UART_CTS_C // SPI_SS0 // TSin_D0_A)BTPCM_SYNC
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GND252680 (90)1GPIOX_1C3(SDIO_D1)WIFI_SD_D1
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I2C_SDA_A(UART_CTS_B // I2C_SDA_B)E2GPIODV_26175 (85)272876 (86)1GPIODV_27F3(UART_RTS_B // I2C_SCK_B)I2C_SCK_A
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BT_ENB5GPIOX_17196 (106)2930GND
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BT_WAKE_HOSTB7GPIOX_18197 (107)313295 (105)1GPIOX_16A3(PWM_E )WIFI_32K
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WIFI_PWREN(PWM_A)D2GPIOX_6185 (95)3334GND
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WIFI_WAKE_HOST(SDIO_IRQ // PWM_F)C1GPIOX_7186 (96)353681 (91)1GPIOX_2C2(SDIO_D2)WIFI_SD_D2
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WIFI_SD_CMD(SDIO_CMD)D3GPIOX_5184 (94)373882 (92)1GPIOX_3B1(SDIO_D3)WIFI_SD_D3
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GND394083 (93)1GPIOX_4B2(SDIO_CLK)WIFI_SD_CLK
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USB/Ethernet Side
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8 Pin ADC + I2S Header
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CVBS/Ethernet Side
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ADC0B8SARADC_CH01
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ADC2F9SARADC_CH22
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I2SOUT-CH01(JTAG_TDO // I2SOUT_CH01 // TSin_D_VALID_B)N19GPIOH_9125 (35)3
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I2S-LR-CLK(JTAG_TDI // I2S_LR_CLK_OUT // TSin_SOP_B)M19GPIOH_8124 (34)4
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I2S-AO-CLK(JTAG_TMS // I2S_AO_CLK_OUT // Tsin_D0_B)N18GPIOH_7123 (33)5
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I2S-AM-CLK(JTAG_TCK // I2S_AM_CLK // TSin_CLK_B)N20GPIOH_6122 (32)6
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GND7
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VDDIO_AO3.3V8
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MicroUSB/LED Side
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3 Pin UART Header
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Board Edge Side
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GND1
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Linux_TX(UART_TX_AO_A // UART_TX_AO_B)C9GPIOAO_0002
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Linux_RX(UART_RX_AO_A // UART_RX_AO_B)B9GPIOAO_1013
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8 Pin Header Side
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3 Pin SPDIF Header
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CVBS Side
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GND1
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SPDIF_OUT(SPDIF_OUT // SPDIF_IN)G19GPIOH_4120 (30)2
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VCC5V3
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HDMI Side
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* Requires 2J1 jumper to be positioned to pass GPIOAO_8 to 40 pin header
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** Requires non-mainline code to toggle secure register, mainline supports output only
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GPIO chip 0 accounts for the first 10 GPIO numbers and GPIO chip 1 pins must add the GPIO chip 0 offset of 10 to the pin to get the quoted GPIO number for /sys/class/gpio/export. This is not necessary for gpiod library since the GPIO chip must be supplied so use the unquoted GPIO number.
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GPIOX bank will output 3.3V by default and it can be modified to output 1.8V by removing the 0 Ohm resistor from 7R1 and attaching it to 7R4. Performing this will void the board warranty.
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