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GPU count = Total FLOPs ÷ (training time [s] × per-GPU TFLOPs × MFU)
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Scenario
Total FLOPs (FLOPs)
Training Time (days)
Training Time (s)
TFLOPs per GPU*
TFLOPs to FLOPs/s
MFU (0–1)
GPUs Required
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H100 · 90d3E+2490777600020002E+150,552349
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H100 · 150d3E+241501296000020002E+150,552210
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A100 · 90d3E+249077760003123120000000000000,5522240
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A100 · 150d3E+24150129600003123120000000000000,5521344
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* The throughput values used in this study—2,000 TFLOPs for H100 and 312 TFLOPs for A100—correspond to the peak theoretical performance of each GPU under current-generation precision formats. Specifically, H100 performance reflects FP8 throughput enabled by NVIDIA’s Transformer Engine, which dynamically combines FP8 and FP16 operations to maintain training accuracy while maximizing throughput. This mode is now standard in large-scale LLM pretraining and achieves up to 2,000 TFLOPs in mixed-precision workloads (NVIDIA, 2023a).
In contrast, the A100 does not support FP8. Its highest supported training throughput is in FP16, reaching 312 TFLOPs per GPU under optimal conditions (NVIDIA, 2020). These values are consistent with benchmarks from MLPerf and documentation from NVIDIA’s official architecture whitepapers.

References:

NVIDIA. (2023a). NVIDIA H100 Tensor Core GPU Architecture. https://resources.nvidia.com/en-us/architecture/hopper-whitepaper

NVIDIA. (2020). NVIDIA A100 Tensor Core GPU Architecture. https://resources.nvidia.com/en-us/architecture/a100-whitepaper
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