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In-cache computing Eckert, Charles, et al. "Neural cache: Bit-serial in-cache acceleration of deep neural networks." 2018 ACM/IEEE 45Th annual international symposium on computer architecture (ISCA). IEEE, 2018.Stanley Zhao
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Aga, Shaizeen, et al. "Compute caches." 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA). IEEE, 2017.Ivann De la Cruz
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In/Near DRAM processing Seshadri, Vivek, et al. "Ambit: In-memory accelerator for bulk bitwise operations using commodity DRAM technology." 2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO). IEEE, 2017.
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Gao, Fei, Georgios Tziantzioulis, and David Wentzlaff. "Computedram: In-memory compute using off-the-shelf drams." Proceedings of the 52nd annual IEEE/ACM international symposium on microarchitecture. 2019.
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Hajinazar, Nastaran, et al. "SIMDRAM: a framework for bit-serial SIMD processing using DRAM." Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems. 2021.
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Ke, Liu, et al. "Recnmp: Accelerating personalized recommendation with near-memory processing." 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA). IEEE, 2020.Erfan Shayegani
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Cho, Benjamin Y., et al. "Near data acceleration with concurrent host access." 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA). IEEE, 2020.
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In-NVM Processing Fernandez, Ivan, et al. "Accelerating Time Series Analysis via Processing using Non-Volatile Memories." arXiv preprint arXiv:2211.04369 (2022).
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Chi, Ping, et al. "Prime: A novel processing-in-memory architecture for neural network computation in reram-based main memory." ACM SIGARCH Computer Architecture News 44.3 (2016): 27-39.Ratnodeep Bandyopadhyay
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Shafiee, Ali, et al. "ISAAC: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars." ACM SIGARCH Computer Architecture News 44.3 (2016): 14-26.Manjeet Singh Bhatia
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In-storage processing Mansouri Ghiasi, Nika, et al. "GenStore: a high-performance in-storage processing system for genome sequence analysis." Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems. 2022.
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Ruan, Zhenyuan, Tong He, and Jason Cong. "{INSIDER}: Designing {In-Storage} Computing System for Emerging {High-Performance} Drive." 2019 USENIX Annual Technical Conference (USENIX ATC 19). 2019.Lawrence Wang
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Hu, Yu-Ching, et al. "Dynamic multi-resolution data storage." Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture. 2019.Amirali Mazooji
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Security for data-centric architecturesXiong, Wenjie, et al. "SecNDP: Secure Near-Data Processing with Untrusted Memory." 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 2022.Sahar Ghoflsaz
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Wang, Ziyu, et al. "Side-channel attack analysis on in-memory computing architectures." arXiv preprint arXiv:2209.02792 (2022).Pedram Zaree
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Ensan, Sina Sayyah, et al. "SCARE: Side Channel Attack on In-Memory Computing for Reverse Engineering." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29.12 (2021): 2040-2051Qun Lou
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