KORE's ISA (Kuggo's CPU)

	A	B	C	D	E	F	G	H	I	J	K	U
1	5-bit Opcode	Type of Instruction	Short	Name	Description	ALU functions	3-bit Operand		Condition table	Name	Representation
2	00000	yeet	NOP	No Operation	{ }	{ }	{ }	k	0	True	If true
3	00001	ALU Operations	ADD	Addition	Acc + Reg[@]	A; R; SA	Register[@]	k	1	negative	If msb == 1
4	00010		SUB	Subtraction	Acc - Reg[@]	A; !R; Cin; SA	Register[@]	k	2	zero	If ALU == 0
5	00011		INC	Increment	Reg[@] +1	R; Cin;	Register[@]	k	4	carry	If over/underflow
6	00100		DEC	Decrement	Reg[@] -1	R; A; !A	Register[@]	k	Can be combined using OR
7	00101		RSH	Right Shift	Reg[@] /2	R; LS	Register[@]	k
8	00110		LSH	Left Shift	Reg[@] x2	R; RS	Register[@]	k
9	00111		XOR	Exclusive Or	Acc XOR Reg[@]	!A; R; DCC; Cin; SA	Register[@]	k
10	01000	Register Operations	AST	Accumulator Store	Acc = Reg[@]	R; SA;	Register[@]	k				Registers
11	01001	Register Operations	RST	Register Store	Reg[@] = Acc	A; SA;	Register[@]	k				0
12	01010	RAM	MST	Memory Store	RAM[next instruction] = Acc	{ }	{ }	k				1
13	01011	RAM	MLD	Memory Load	Acc = RAM[next instruction]	{ }	{ }	k				2
14	01100	Stack	CAL	Stack Call	Push PC to stack; pc = jump address	{ }	ALU Flags					3
15	01101	Stack	RET	Stack Return	PC = Pop Stack	{ }	ALU Flags					4
16	01110	Instructions	LIM	Load Immediate	Reg[@] = [next instruction]	{ }	Register[@]	k				5
17	01111		RJP	Relative Jump to	PC = PC + [next instruction]	{ }	ALU Flags	the number given must be value -1				6
18	10000		RJI	Relative Jump if not	PC = PC + [next instruction]	{ }	ALU Flags	the number given must be value -1
19	10001		JMP	Jump to	PC = [next instruction]	{ }	ALU Flags	k
20	10010		JIN	Jump if not	PC = [next instruction] if not	{ }	ALU Flags	k				7
21	10011	Clock	HLT	Halt CPU	Stop the Clock	{ }	{ }	k
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35	5-bit opcode					Can be made of
36		yeet	NOP	No operation	{ }	ADD $0, $0, $0
37	0	Arithmetic operations	ADD	Addition	$A = $B + $C
38	1		ADC	Add with carry	$A = $B + $C + 1
39	10		SUB	Subtraction	$A = $B - $C
40	11		SBB	Subtract with borrow	$A = $B + $C - 1
41			INC	Increment	$A = $B + 1	ADC $A, $B, $0
42			DEC	Decrement	$A = $B -1	SBB $A, $B, $0
43			RSH	Right Shift	$A = $B /2	BSH $A, $B, -1
44			LSH	Left Shift	$A = $B *2	BSH $A, $B, 1
45	100		BSH	Barrel Shift	$A = $B << [amount]
46	101		MLT	Multiply	$A = $B * $C
47	110		DIV	Divide	$A = $B / $C
48	111	Bitwise Logic operations	MOD	Modulus/Remaider	$A = $B % $C
49			NOT	Not Gate	$A = ~$B	XNOR $A, $B, $0
50	1000		OR	Or Gate	$A = $B \| $C
51	1001		NOR	Nor Gate	$A = ~($B \| $C)
52	1010		XOR	Exclusive Or Gate	$A = $B ^ $C
53	1011		XNOR	Exclusive Nor Gate	$A = ~($B ^ $C)
54	1100		AND	And Gate	$A = $B & $C
55	1101	Register operations	NAND	Nand Gate	$A = ~$B \| ~$C
56			MOV	Move	$A = $B	ADD $A, $B, $0
57	1110		IMM	Load Immediate Value	$A = [Immediate Value]
58	1111
59	10000
60	10001	RAM operations	STR	Memory Store	Stores $4, $5, $6, $7 to RAM[address]
61	10010	RAM operations	LOD	Memory Load	Retrieves RAM[address] to $4, $5, $6, $7
62	10011	I/O operations	IN	Port Load	$A = port[address]
63	10100	I/O operations	OUT	Port Store	port[address] = $A
64	10101	Value Stack operations	PSH	Push to Value Stack	Push $A, Push $B, Push $C
65	10110	Value Stack operations	POP	Pop to Value Stack	Pop to $A, Pop to $B, Pop to $C
66	10111
67	11000	Branches	CAL	Call subroutine	Push PC+1 to call stack and PC = A
68	11001		RET	Return	PC = pop call stack
69	11010		BRA	Branch if	if flags PC = [address]
70	11011		BRAIN	Branch if not	if !flags PC = [address]
71	11100		BRA$	Branch to reg	if flags PC = $A
72	11101		BRAIN$	Branch if not to reg	if !flags PC = $A
73	11111	Clock	HLT	Halt CPU's clock	<----
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