| A | B | C | D | E | F | G | H | I | J | K | |
|---|---|---|---|---|---|---|---|---|---|---|---|
1 | 45nm Quad Core and 790 board | e.g. DDR3 | 45nm Dual Core and 790 board | e.g. DDR3 | |||||||
2 | RAM speed | RAM speed | |||||||||
3 | FSB [MHz] | 450 | (value irrelevant for calculations) | 1800MHz | FSB [MHz] | 450 | (value irrelevant for calculations) | 1800MHz | |||
4 | Target VTT [V] | 1.15 | Target VTT [V] | 1.15 | |||||||
5 | Current GTLVREF (automatic mode): | Offset: | Current GTLVREF (automatic mode): | Offset: | |||||||
6 | Data Lane0 [mV] | -50 | 34.5 | Data Lane0 [mV] | -50 | -34.5 | ? | ||||
7 | Data Lane1 [mV] | -50 | 34.5 | Address Lane1 [mV] | 0 | -17.25 | ? | ||||
8 | Address Lane0 [mV] | 0 | 17.25 | ||||||||
9 | Address Lane1 [mV] | 0 | 17.25 | Adjusted GTLVREF for target VTT: | |||||||
10 | Data Lane0 [mV] | -84.5 | in BIOS | e.g. -85 | |||||||
11 | Adjusted GTLVREF for target VTT: | Address Lane0 [mV] | -67.25 | in BIOS | e.g. -70 | ||||||
12 | Data Lane0 [mV] | -15.5 | round down in BIOS | e.g. -15 | |||||||
13 | Data Lane1 [mV] | -15.5 | round down in BIOS | e.g. -15 | |||||||
14 | Address Lane0 [mV] | -32.75 | round down in BIOS | e.g. -30 | |||||||
15 | Address Lane1 [mV] | -32.75 | round down in BIOS | e.g. -30 | |||||||
16 | CONFIRMED with Q9450 and evga 790 Ultra SLI | ||||||||||
17 | |||||||||||
18 | |||||||||||
19 | 45nm Quad Core and 790 board | e.g. DDR3 | 45nm Dual Core and 790 board | e.g. DDR3 | |||||||
20 | RAM speed | RAM speed | |||||||||
21 | FSB [MHz] | 466 | (value irrelevant for calculations) | 1866MHz | FSB [MHz] | 466 | (value irrelevant for calculations) | 1866MHz | |||
22 | Target VTT [V] | 1.2 | or 1.25 | Target VTT [V] | 1.2 | ||||||
23 | Current GTLVREF (automatic mode): | Offset: | Current GTLVREF (automatic mode): | Offset: | |||||||
24 | Data Lane0 [mV] | -80 | 36 | Data Lane0 [mV] | -80 | -36 | ? | ||||
25 | Data Lane1 [mV] | -100 | 36 | Address Lane0 [mV] | 0 | -18 | ? | ||||
26 | Address Lane0 [mV] | 0 | 18 | ||||||||
27 | Address Lane1 [mV] | 0 | 18 | Adjusted GTLVREF for target VTT: | |||||||
28 | Data Lane0 [mV] | -116 | in BIOS | e.g. --115 | |||||||
29 | Adjusted GTLVREF for target VTT: | Address Lane0 [mV] | -98 | in BIOS | e.g. -100 | ||||||
30 | Data Lane0 [mV] | -44 | in BIOS | e.g. -45 | |||||||
31 | Data Lane1 [mV] | -64 | in BIOS | e.g. -65 | |||||||
32 | Address Lane0 [mV] | -62 | in BIOS | e.g. -60 | |||||||
33 | Address Lane1 [mV] | -82 | in BIOS | e.g. -80 | |||||||
34 | CONFIRMED with Q9450 and evga 790 Ultra SLI | ||||||||||
35 | |||||||||||
36 | |||||||||||
37 | 45nm Quad Core and 790 board | e.g. DDR3 | |||||||||
38 | RAM speed | ||||||||||
39 | FSB [MHz] | 483 | (value irrelevant for calculations) | 1932MHz | |||||||
40 | Target VTT [V] | 1.3 | |||||||||
41 | Current GTLVREF (automatic mode): | Offset: | |||||||||
42 | Data Lane0 [mV] | -80 | 39 | ||||||||
43 | Data Lane1 [mV] | -100 | 39 | ||||||||
44 | Address Lane0 [mV] | 0 | 19.5 | ||||||||
45 | Address Lane1 [mV] | 0 | 19.5 | ||||||||
46 | |||||||||||
47 | Adjusted GTLVREF for target VTT: | ||||||||||
48 | Data Lane0 [mV] | -41 | in BIOS | e.g. -40 | |||||||
49 | Data Lane1 [mV] | -61 | in BIOS | e.g. -60 | |||||||
50 | Address Lane0 [mV] | -60.5 | in BIOS | e.g. -60 | |||||||
51 | Address Lane1 [mV] | -80.5 | in BIOS | e.g. -80 | |||||||
52 | |||||||||||
53 | |||||||||||
54 | |||||||||||
55 | 45nm Quad Core and 790 board | e.g. DDR3 | |||||||||
56 | RAM speed | ||||||||||
57 | FSB [MHz] | 500 | (value irrelevant for calculations) | 2000MHz | |||||||
58 | Target VTT [V] | 1.35 | |||||||||
59 | Current GTLVREF (automatic mode): | Offset: | |||||||||
60 | Data Lane0 [mV] | -80 | 40.5 | ||||||||
61 | Data Lane1 [mV] | -100 | 40.5 | ||||||||
62 | Address Lane0 [mV] | 0 | 20.25 | ||||||||
63 | Address Lane1 [mV] | 0 | 20.25 | ||||||||
64 | |||||||||||
65 | Adjusted GTLVREF for target VTT: | ||||||||||
66 | Data Lane0 [mV] | -39.5 | in BIOS | e.g. -35 | |||||||
67 | Data Lane1 [mV] | -59.5 | in BIOS | e.g. -55 | |||||||
68 | Address Lane0 [mV] | -59.75 | in BIOS | e.g. -55 | |||||||
69 | Address Lane1 [mV] | -79.75 | in BIOS | e.g. -75 | |||||||
70 | |||||||||||
71 | |||||||||||
72 | |||||||||||
73 | |||||||||||
74 |