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1 | Description | Description | Speed Ratings (x samples / second) | "Super High Speed" Config - 4x | "High Speed" Config - 1x | Non-GTP Config - 4x | Non-GTP Config - 8x | Non-GTP Config - 16x | |||||||||||||||||
2 | Pin | Side B | Side A | Side B | Side A | Side B | Side A | Side B | Side A | Side B | Side A | Side B | Side A | Side B | Side A | ||||||||||
3 | 1 | +12 V | PRSNT1# | 12V Power | Board size identification | +12 V | PRSNT1# | +12 V | PRSNT1# | +12 V | PRSNT1# | +12 V | PRSNT1# | +12 V | PRSNT1# | ||||||||||
4 | 2 | +12 V | +12 V | 12V Power | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | |||||||||||
5 | 3 | +12 V | +12 V | 12V Power | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | +12 V | |||||||||||
6 | 4 | GND | GND | GND | GND | GND | GND | GND | GND | GND | GND | GND | GND | ||||||||||||
7 | 5 | SMCLK | DIFF IO A 0P | Expansion board identification and configuration | Diff IO pair A0 | Max 10 M/s | Max 1.5G/s | SMCLK | DIFF IO A 0P | SMCLK | DIFF IO A 0P | SMCLK | DIFF IO A 0P | SMCLK | DIFF IO A 0P | SMCLK | DIFF IO A 0P | ||||||||
8 | 6 | SMDAT | DIFF IO A 0N | Max 10 M/s | SMDAT | DIFF IO A 0N | SMDAT | DIFF IO A 0N | SMDAT | DIFF IO A 0N | SMDAT | DIFF IO A 0N | SMDAT | DIFF IO A 0N | |||||||||||
9 | 7 | GND | DIFF IO B 0P | Diff IO pair B0 | 3.3V Power | Max 1.5G/s | GND | DIFF IO B 0P | GND | DIFF IO B 0P | GND | DIFF IO B 0P | GND | DIFF IO B 0P | GND | DIFF IO B 0P | |||||||||
10 | 8 | +3.3 V | DIFF IO B 0N | 3.3V Power | +3.3 V | DIFF IO B 0N | +3.3 V | DIFF IO B 0N | +3.3 V | DIFF IO B 0N | +3.3 V | DIFF IO B 0N | +3.3 V | DIFF IO B 0N | |||||||||||
11 | 9 | DIFF IO XP | +3.3 V | Special Diff IO pair X (+) | 3.3V Power | Max 500M/s | DIFF IO XP | +3.3 V | DIFF IO XP | +3.3 V | DIFF IO XP | +3.3 V | DIFF IO XP | +3.3 V | DIFF IO XP | +3.3 V | |||||||||
12 | 10 | +3.3 V aux | +3.3 V | 3.3V Power | 3.3V Power | +3.3 V aux | +3.3 V | +3.3 V aux | +3.3 V | +3.3 V aux | +3.3 V | +3.3 V aux | +3.3 V | +3.3 V aux | +3.3 V | ||||||||||
13 | 11 | DIFF IO XN | PERST# | Special Diff IO pair X (-) | Expansion board reset | Max 500M/s | DIFF IO XN | PERST# | DIFF IO XN | PERST# | DIFF IO XN | PERST# | DIFF IO XN | PERST# | DIFF IO XN | PERST# | |||||||||
14 | 11.5 | Keynotch | |||||||||||||||||||||||
15 | 12 | DIFF IO YN | GND | Special Diff IO pair Y (-) | Max 500M/s | DIFF IO YN | GND | IO | GND | DIFF IO YN | GND | DIFF IO YN | GND | DIFF IO YN | GND | ||||||||||
16 | 13 | GND | DIFF GCLK XP | Special Diff Clock pair X | Max 10G/s (or) Max 1.5G/s | GND | MGTREFCLK0N_101 | GND | DIFF GCLK XP | GND | DIFF GCLK XP | GND | DIFF GCLK XP | GND | DIFF GCLK XP | ||||||||||
17 | 14 | DIFF IO B 1P | DIFF GCLK XN | Diff IO pair B1 | Max 10G/s (or) Max 1.5G/s | MGTRXN0_101 | MGTREFCLK0P_101 | DIFF IO B 1P | DIFF GCLK XN | DIFF IO B 1P | DIFF GCLK XN | DIFF IO B 1P | DIFF GCLK XN | DIFF IO B 1P | DIFF GCLK XN | ||||||||||
18 | 15 | DIFF IO B 1N | GND | MGTRXP0_101 | GND | DIFF IO B 1N | GND | DIFF IO B 1N | GND | DIFF IO B 1N | GND | DIFF IO B 1N | GND | ||||||||||||
19 | 16 | GND | DIFF IO A 1P | Diff IO pair A0 | Max 10G/s (or) Max 1.5G/s | GND | MGTTXN0_101 | GND | DIFF IO A 1P | GND | DIFF IO A 1P | GND | DIFF IO A 1P | GND | DIFF IO A 1P | ||||||||||
20 | 17 | PRSNT2# | DIFF IO A 1N | Board size identification | PRSNT2# | MGTTXP0_101 | PRSNT2# | DIFF IO A 1N | PRSNT2# | DIFF IO A 1N | PRSNT2# | DIFF IO A 1N | PRSNT2# | DIFF IO A 1N | |||||||||||
21 | 18 | GND | GND | GND | GND | GND | GND | GND | GND | GND | GND | GND | GND | ||||||||||||
22 | 18.5 | PCI Express Ć1 cards end at pin 18 | --------------------------------------------- | ||||||||||||||||||||||
23 | 19 | DIFF IO B 2P | DIFF IO YP | Diff IO pair B2 | Special Diff IO pair Y (+) | Max 10G/s (or) Max 1.5G/s | Max 500M/s | MGTRXN1_101 | DIFF IO YP | DIFF IO* | 10 | DIFF IO B 2P | DIFF IO YP | DIFF IO B 2P | DIFF IO YP | DIFF IO B 2P | DIFF IO YP | ||||||||
24 | 20 | DIFF IO B 2N | GND | MGTRXP1_101 | GND | DIFF GCLK* | 2 | DIFF IO B 2N | GND | DIFF IO B 2N | GND | DIFF IO B 2N | GND | ||||||||||||
25 | 21 | GND | DIFF IO A 2P | Diff IO pair A2 | Max 10G/s (or) Max 1.5G/s | GND | MGTTXN1_101 | IO | 1 | GND | DIFF IO A 2P | GND | DIFF IO A 2P | GND | DIFF IO A 2P | ||||||||||
26 | 22 | GND | DIFF IO A 2N | GND | MGTTXP1_101 | Total IO Pins | 13 | GND | DIFF IO A 2N | GND | DIFF IO A 2N | GND | DIFF IO A 2N | ||||||||||||
27 | 23 | DIFF IO B 3P | GND | Diff IO pair B3 | Max 10G/s (or) Max 1.5G/s | MGTRXN0_123 | GND | DIFF IO B 3P | GND | DIFF IO B 3P | GND | DIFF IO B 3P | GND | ||||||||||||
28 | 24 | DIFF IO B 3N | GND | MGTRXP0_123 | GND | DIFF GCLK X* | 2 | DIFF IO B 3N | GND | DIFF IO B 3N | GND | DIFF IO B 3N | GND | ||||||||||||
29 | 25 | GND | DIFF IO A 3P | Diff IO pair A3 | Max 10G/s (or) Max 1.5G/s | GND | MGTTXN0_123 | DIFF GCLK 0* | 0 | GND | DIFF IO A 3P | GND | DIFF IO A 3P | GND | DIFF IO A 3P | ||||||||||
30 | 26 | GND | DIFF IO A 3N | GND | MGTTXP0_123 | Total Lanes | 1 | GND | DIFF IO A 3N | GND | DIFF IO A 3N | GND | DIFF IO A 3N | ||||||||||||
31 | 27 | DIFF GCLK 0P B | GND | Diff Clock pair B0 | Max 10G/s (or) Max 1.5G/s | MGTRXN1_123 | GND | DIFF GCLK 0P B | GND | DIFF GCLK 0P B | GND | DIFF GCLK 0P B | GND | ||||||||||||
32 | 28 | DIFF GCLK 0N B | GND | MGTRXP1_123 | GND | DIFF IO X* | 2 | DIFF GCLK 0N B | GND | DIFF GCLK 0N B | GND | DIFF GCLK 0N B | GND | ||||||||||||
33 | 29 | GND | DIFF GCLK 0P A | Diff Clock pair A0 | Max 10G/s (or) Max 1.5G/s | GND | MGTTXN1_123 | DIFF IO Y* | 0 | GND | DIFF GCLK 0P A | GND | DIFF GCLK 0P A | GND | DIFF GCLK 0P A | ||||||||||
34 | 30 | DIFF IO ZN | DIFF GCLK 0P A | Special Diff IO pair Z (-) | Max 500M/s | DIFF IO ZN | MGTTXP1_123 | Total Lanes | 1 | DIFF IO ZN | DIFF GCLK 0P A | DIFF IO ZN | DIFF GCLK 0P A | DIFF IO ZN | DIFF GCLK 0P A | ||||||||||
35 | 31 | PRSNT2# | GND | Board size identification | PRSNT2# | GND | PRSNT2# | GND | PRSNT2# | GND | PRSNT2# | GND | |||||||||||||
36 | 32 | GND | DIFF IO ZP | Special Diff IO pair Z (+) | Max 500M/s | GND | DIFF IO ZP | DIFF IO *B* | 4 | GND | DIFF IO ZP | GND | DIFF IO ZP | GND | DIFF IO ZP | ||||||||||
37 | 32.5 | PCI Express Ć4 cards end at pin 32 | DIFF IO *A* | 4 | --------------------------------------------- | ||||||||||||||||||||
38 | 33 | DIFF IO B 4P | IO0 | Diff IO pair B4 | Spare IO Pin | Max 10G/s (or) Max 1.5G/s | DIFF IO* | 22 | DIFF IO B 4P | IO0 | DIFF IO B 4P | IO0 | |||||||||||||
39 | 34 | DIFF IO B 4N | GND | DIFF IO *0* | 4 | DIFF GCLK* | 6 | DIFF IO B 4N | GND | DIFF IO B 4N | GND | ||||||||||||||
40 | 35 | GND | DIFF IO A 4P | Diff IO pair A4 | Max 10G/s (or) Max 1.5G/s | DIFF IO *1* | 4 | IO | 0 | GND | DIFF IO A 4P | GND | DIFF IO A 4P | ||||||||||||
41 | 36 | GND | DIFF IO A 4N | DIFF IO *2* | 0 | Total IO Pins | 28 | GND | DIFF IO A 4N | GND | DIFF IO A 4N | ||||||||||||||
42 | 37 | DIFF IO B 5P | GND | Diff IO pair B5 | Max 10G/s (or) Max 1.5G/s | Total Lanes | 4 | DIFF IO B 5P | GND | DIFF IO B 5P | GND | ||||||||||||||
43 | 38 | DIFF IO B 5N | GND | DIFF GCLK X* | 2 | DIFF IO B 5N | GND | DIFF IO B 5N | GND | ||||||||||||||||
44 | 39 | GND | DIFF IO A 5P | Diff IO pair A5 | Max 10G/s (or) Max 1.5G/s | --------------------------------------------- | GND | DIFF IO A 5P | GND | DIFF IO A 5P | |||||||||||||||
45 | 40 | GND | DIFF IO A 5N | DIFF GCLK 0* | 4 | GND | DIFF IO A 5N | GND | DIFF IO A 5N | ||||||||||||||||
46 | 41 | DIFF IO B 6P | GND | Diff IO pair B6 | Max 10G/s (or) Max 1.5G/s | DIFF GCLK 1* | 0 | DIFF IO B 6P | GND | DIFF IO B 6P | GND | ||||||||||||||
47 | 42 | DIFF IO B 6N | GND | Total Lanes | 3 | DIFF IO B 6N | GND | DIFF IO B 6N | GND | ||||||||||||||||
48 | 43 | GND | DIFF IO A 6P | Diff IO pair A6 | Max 10G/s (or) Max 1.5G/s | GND | DIFF IO A 6P | GND | DIFF IO A 6P | ||||||||||||||||
49 | 44 | GND | DIFF IO A 6N | DIFF IO X* | 2 | GND | DIFF IO A 6N | GND | DIFF IO A 6N | ||||||||||||||||
50 | 45 | DIFF GCLK 1P B | GND | Diff Clock pair B1 | Max 10G/s (or) Max 1.5G/s | --------------------------------------------- | DIFF GCLK 1P B | GND | DIFF GCLK 1P B | GND | |||||||||||||||
51 | 46 | DIFF GCLK 1N B | GND | DIFF IO Y* | 2 | DIFF GCLK 1N B | GND | DIFF GCLK 1N B | GND | ||||||||||||||||
52 | 47 | GND | DIFF GCLK 1P A | Diff Clock pair A1 | Max 10G/s (or) Max 1.5G/s | DIFF IO Z* | 2 | GND | DIFF GCLK 1P A | GND | DIFF GCLK 1P A | ||||||||||||||
53 | 48 | PRSNT2# | DIFF GCLK 1N A | Board size identification | Total Lanes | 3 | PRSNT2# | DIFF GCLK 1N A | PRSNT2# | DIFF GCLK 1N A | |||||||||||||||
54 | 49 | GND | GND | GND | GND | GND | GND | ||||||||||||||||||
55 | 49.5 | PCI Express Ć8 cards end at pin 49 | DIFF IO *B* | 8 | --------------------------------------------- | ||||||||||||||||||||
56 | 50 | DIFF IO B 7P | IO1 | Max 10G/s (or) Max 1.5G/s | Max 10 M/s | DIFF IO *A* | 8 | DIFF IO* | 34 | DIFF IO B 7P | IO1 | ||||||||||||||
57 | 51 | DIFF IO B 7N | GND | DIFF GCLK* | 10 | DIFF IO B 7N | GND | ||||||||||||||||||
58 | 52 | GND | DIFF IO A 7P | Max 10G/s (or) Max 1.5G/s | DIFF IO *0* | 4 | IO* | 1 | GND | DIFF IO A 7P | |||||||||||||||
59 | 53 | GND | DIFF IO A 7N | DIFF IO *1* | 4 | Total IO Pins | 45 | GND | DIFF IO A 7N | ||||||||||||||||
60 | 54 | DIFF IO B 8P | GND | Max 10G/s (or) Max 1.5G/s | --------------------------------------------- | DIFF IO B 8P | GND | ||||||||||||||||||
61 | 55 | DIFF IO B 8N | GND | DIFF IO *2* | 4 | DIFF GCLK X* | 2 | DIFF IO B 8N | GND | ||||||||||||||||
62 | 56 | GND | DIFF IO A 8P | Max 10G/s (or) Max 1.5G/s | DIFF IO *3* | 4 | DIFF GCLK *0* | 4 | GND | DIFF IO A 8P | |||||||||||||||
63 | 57 | GND | DIFF IO A 8N | DIFF IO *4* | 0 | --------------------------------------------- | GND | DIFF IO A 8N | |||||||||||||||||
64 | 58 | DIFF IO B 9P | GND | Max 10G/s (or) Max 1.5G/s | Total Lanes | 8 | DIFF GCLK *1* | 4 | DIFF IO B 9P | GND | |||||||||||||||
65 | 59 | DIFF IO B 9N | GND | DIFF GCLK *2* | 0 | DIFF IO B 9N | GND | ||||||||||||||||||
66 | 60 | GND | DIFF IO A 9P | Max 10G/s (or) Max 1.5G/s | Total Lanes | 5 | GND | DIFF IO A 9P | |||||||||||||||||
67 | 61 | GND | DIFF IO A 9N | GND | DIFF IO A 9N | ||||||||||||||||||||
68 | 62 | DIFF IO B 10P | GND | Max 10G/s (or) Max 1.5G/s | DIFF IO X* | 2 | DIFF IO B 10P | GND | |||||||||||||||||
69 | 63 | DIFF IO B 10N | GND | DIFF IO Y* | 2 | DIFF IO B 10N | GND | ||||||||||||||||||
70 | 64 | GND | DIFF IO A 10P | Max 10G/s (or) Max 1.5G/s | DIFF IO Z* | 2 | GND | DIFF IO A 10P | |||||||||||||||||
71 | 65 | GND | DIFF IO A 10N | Total Lanes | 3 | GND | DIFF IO A 10N | ||||||||||||||||||
72 | 66 | DIFF IO B 11P | GND | Max 10G/s (or) Max 1.5G/s | DIFF IO B 11P | GND | |||||||||||||||||||
73 | 67 | DIFF IO B 11N | GND | DIFF IO *B* | 14 | DIFF IO B 11N | GND | ||||||||||||||||||
74 | 68 | GND | DIFF IO A 11P | Max 10G/s (or) Max 1.5G/s | DIFF IO *A* | 14 | GND | DIFF IO A 11P | |||||||||||||||||
75 | 69 | GND | DIFF IO A 11N | GND | DIFF IO A 11N | ||||||||||||||||||||
76 | 70 | DIFF GCLK 2P B | GND | Max 10G/s (or) Max 1.5G/s | DIFF IO *0* | 4 | DIFF GCLK 2P B | GND | |||||||||||||||||
77 | 71 | DIFF GCLK 2N B | GND | DIFF IO *1* | 4 | DIFF GCLK 2N B | GND | ||||||||||||||||||
78 | 72 | GND | DIFF GCLK 2P A | Max 10G/s (or) Max 1.5G/s | DIFF IO *2* | 4 | GND | DIFF GCLK 2P A | |||||||||||||||||
79 | 73 | GND | DIFF GCLK 2N A | DIFF IO *3* | 4 | GND | DIFF GCLK 2N A | ||||||||||||||||||
80 | 74 | IO2 | GND | Max 500M/s | DIFF IO *4* | 4 | IO2 | GND | |||||||||||||||||
81 | 75 | IO3 | GND | Max 500M/s | --------------------------------------------- | IO3 | GND | ||||||||||||||||||
82 | 76 | GND | IO4 | Max 500M/s | DIFF IO *5* | 4 | GND | IO4 | |||||||||||||||||
83 | 77 | GND | IO5 | Max 500M/s | DIFF IO *6* | 4 | GND | IO5 | |||||||||||||||||
84 | 78 | IO6 | GND | Max 500M/s | DIFF IO *7* | 0 | IO6 | GND | |||||||||||||||||
85 | 79 | IO7 | GND | Max 500M/s | Total Lanes | 14 | IO7 | GND | |||||||||||||||||
86 | 80 | GND | IO8 | Max 500M/s | GND | IO8 | |||||||||||||||||||
87 | 81 | PRSNT2# | IO9 | Max 500M/s | PRSNT2# | IO9 | |||||||||||||||||||
88 | 82 | IO10 | GND | Max 500M/s | IO10 | GND | |||||||||||||||||||
89 | PCI Express Ć16 cards end at pin 82 | --------------------------------------------- | |||||||||||||||||||||||
90 | DIFF IO * | 54 | DIFF IO | 0 | |||||||||||||||||||||
91 | DIFF GCLK * | 14 | DIFF GCLK | 0 | |||||||||||||||||||||
92 | IO* | 11 | IO* | 11 | |||||||||||||||||||||
93 | GCLK | 0 | GCLK | 0 | |||||||||||||||||||||
94 | NC | 0 | NC | 0 | |||||||||||||||||||||
95 | Total IO Pins | 79 | Total IO Pins | 11 | |||||||||||||||||||||
96 | |||||||||||||||||||||||||
97 | DIFF GCLK X* | 2 | DIFF GCLK X* | 2 | |||||||||||||||||||||
98 | DIFF GCLK *0* | 4 | DIFF GCLK *0* | 4 | |||||||||||||||||||||
99 | DIFF GCLK *1* | 4 | DIFF GCLK *1* | 4 | |||||||||||||||||||||
100 | --------------------------------------------- | --------------------------------------------- |