URCL V1.0.0 - Last Update 21st Jan 2021

	B	C	D	E	F	G	H	I	K
1
2	Core Instructions:
3	Op Code	Operand 1	Operand 2	Operand 3	Full Name	Explanation	Commutative?	Importance For Being Able to Run URCL	General Notes:
4	ADD	Register	Register	Register	Add	Add Op2 to Op3 then put result into Op1	Yes for Ops 2 and 3	Very High	Operands 1, 2 or 3 can be an immediate value if it makes sense.
5		Register	Register	Immediate or Label			Yes for Ops 2 and 3	Very High	Both absolute addresses and addresses stored in registers are supported for memory. For branching relative addresses or labels must be used.
6		Register	Immediate or Label	Immediate or Label			Yes for Ops 2 and 3	High	cyan = core, yellow = complex, red = special instructions, also cyan? = directives
7									Relative addresses will be denoted by a number with a + or - symbol prefixed, so +5 is 5 instructions ahead of the current.
8	SUB	Register	Register	Register	Subtract	Subtract Op3 from Op2 then put result into Op1	No	Very High	Register zero (R0 or $0) is a register that cannot be written to and always reads zero when read from.
9		Register	Register	Immediate or Label			No	Very High	If a cpu doesnt directly support the zero register then just replace it with a real register or an immediate value of zero.
10		Register	Immediate or Label	Register			No	Very High	The flags are updated every ALU instruction. This includes bitwise logic, arithmetic, shifting, and compare. (I potentially forgot to mention something but close enough)
11		Register	Immediate or Label	Immediate or Label			No	High	URCL code should use the .urcl file extention. However, .txt files will most likely still be supported.
12									The CPU word size must be specified in the .urcl file header along with the minimum number of registers, minimum amount of RAM and libraries that need to be imported.
13	RSH	Register	Register		Right shift	Right shift Op2 once then put result into Op1	No	Very High	PSH and POP refer to a generic global stack that is accessable anywhere in a program. This stack should not be used for long term storage of values.
14		Register	Immediate or Label				No	Very High	CAL and RET use the call stack, which is seporate from the generic stack. The call stack can only be modified by CAL and RET.
15									If required, the program counter can be read from or written to just like any other general perpose register - however this should be avoided where possible to increase compatibility with simpler CPUs.
16	LSH	Register	Register		Left Shift	Left shift Op2 once then put result into Op1	No	Very High	All complex instructions should be able to be emulated using appropriate core instructions, if a CPU does not support the instruction directly (no hardware multiplier for example).
17		Register	Immediate or Label				No	Very High	All core and complex instructions should not modify the source registers as well as any other registers outside of the registers specified by the operands in the instruction.
18									The generic stack can be used to store temporary/intermediate values for a function or instruction. However, those values must be POP-ed off after they have been used.
19	INC	Register	Register		Increment	Add 1 to Op2 then put result into Op1	No	Very High	The word length for all registers and memory are the same in URCL, so an 8 bit cpu must have 8 bit memory words ect. If this is not true in a specific cpu, then this has to be dealt with on an individual isa basis.
20		Register	Immediate or Label				No	Very High	Commutative means that specific operands can be switched without affecting the instruction (usually Ops 2 and 3)
21									M or # should be used as the prefix for memory address values.
22	DEC	Register	Register		Decrement	Subtract 1 from Op2 then put result into Op1	No	Very High	All directives, if used should be defined by the individual URCL interpreter. Only these few directives are defined explicitly because they are very common place
23		Register	Immediate or Label				No	Very High	All instructions are unsigned unless otherwise stated.
24									If there is a combination of operands that you need missing from this sheet then say something in #urcl-concerns in the URCL discord
25	XOR	Register	Register	Register	Bitwise XOR	Bitwise XOR Op2 and Op3 then put result into Op1	Yes for Ops 2 and 3	High
26		Register	Register	Immediate or Label			Yes for Ops 2 and 3	High
27		Register	Immediate or Label	Immediate or Label			Yes for Ops 2 and 3	Low
28
29	AND	Register	Register	Register	Bitwise AND	Bitwise AND Op2 and Op3 then put result into Op1	Yes for Ops 2 and 3	Very High
30		Register	Register	Immediate or Label			Yes for Ops 2 and 3	Very High
31		Register	Immediate or Label	Immediate or Label			Yes for Ops 2 and 3	High
32
33	OR	Register	Register	Register	Bitwise OR	Bitwise OR Op2 and Op3 then put result into Op1	Yes for Ops 2 and 3	High
34		Register	Register	Immediate or Label			Yes for Ops 2 and 3	High
35		Register	Immediate or Label	Immediate or Label			Yes for Ops 2 and 3	Low
36
37	NOR	Register	Register	Register	Bitwise NOR	Bitwise NOR Op2 and Op3 then put result into Op1	Yes for Ops 2 and 3	High
38		Register	Register	Immediate or Label			Yes for Ops 2 and 3	High
39		Register	Immediate or Label	Immediate or Label			Yes for Ops 2 and 3	Low
40
41	NAND	Register	Register	Register	Bitwise NAND	Bitwise NAND Op2 and Op3 then put result into Op1	Yes for Ops 2 and 3	High
42		Register	Register	Immediate or Label			Yes for Ops 2 and 3	High
43		Register	Immediate or Label	Immediate or Label			Yes for Ops 2 and 3	Low
44
45	XNOR	Register	Register	Register	Bitwise XNOR	Bitwise XNOR Op2 and Op3 then put result into Op1	Yes for Ops 2 and 3	High
46		Register	Register	Immediate or Label			Yes for Ops 2 and 3	High
47		Register	Immediate or Label	Immediate or Label			Yes for Ops 2 and 3	Low
48
49	NOT	Register	Register		Bitwise NOT	Bitwise NOT of Op2 then put result into Op1	No	Very High
50		Register	Immediate or Label				No	Very High
51
52	MOV	Register	Register		Move	Copy Op2 to Op1, Op2 can be an immediate or register	No	Very High
53
54	IMM	Register	Immediate or Label			Copy Op2 to Op1, Op2 must be an immediate	No	Very High
55
56	LOD	Register	RAM Address or Label		Load	Copy RAM value pointed to by Op2 into Op1	No	High	<-- a label can only be used if the program is stored in ram that is accessable by the LOD instruction, otherwise labels cannot be used here
57		Register	Register				No	Low
58
59	STR	RAM Address or Label	Register		Store	Copy Op2 into RAM value pointed to by Op1	No	High	<-- a label can only be used if the program is stored in ram that is accessable by the STR instruction, otherwise labels cannot be used here
60		Register	Register				No	Low
61		RAM Address or Label	Immediate or Label				No	High	<-- a label in the first operand can only be used if the program is stored in ram that is accessable by the STR instruction, otherwise labels cannot be used here
62		Register	Immediate or Label				No	Low
63
64	BRA	Relative Address			Branch Always	Branch to address specified by Op1	No	Very High
65		Label					No	Very High
66		Register					No	High
67
68	BRC	Relative Address			Branch if Carry	Branch to address specified by Op1 if the previous instruction generated a carry	No	High
69		Label					No	High
70		Register					No	Low
71
72	BNC	Relative Address			Branch if No Carry	Branch to address specified by Op1 if the previous instruction did not generate a carry	No	High
73		Label					No	High
74		Register					No	Low
75
76	BRZ	Relative Address			Branch if Zero	Branch to address specified by Op1 if the result of the previous instruction is zero	No	High
77		Label					No	High
78		Register					No	Low
79
80	BNZ	Relative Address			Branch if Not Zero	Branch to address specified by Op1 if the result of the previous instruction is not zero	No	High
81		Label					No	High
82		Register					No	Low
83
84	BRN	Relative Address			Branch if Negative	Branch to address specified by Op1 if the result of the previous instruction is negative (AKA the upper most bit is active)	No	High
85		Label					No	High
86		Register					No	Low
87
88	BRP	Relative Address			Branch if Positive	Branch to address specified by Op1 if the result of the previous instruction is positive (AKA the upper most bit is not active)	No	High
89		Label					No	High
90		Register					No	Low
91
92	NOP				No Op	Do nothing	No	Very Low
93
94	HLT				Halt	Stop Execution	No	Very Low
95
96
97	Complex Instructions:
98	Op Code	Operand 1	Operand 2	Operand 3	Full Name	Explanation	Commutative?	Importance
99	MLT	Register	Register	Register	Multiply	Multiply Op2 by Op3 then put answer into Op1	Yes for Ops 2 and 3	High
100		Register	Register	Immediate or Label			Yes for Ops 2 and 3	High