RISC-V Instruction Formats
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ABCDEFGHIJKLMNOPQRSTUVWXYZAAABACADAEAFAGAH
1
313029282726252423222120191817161514131211109876543210
2
Rfunct7rs2rs1funct3rdopcodeRegister/register
3
Iimm[11:0]rs1funct3rdopcodeImmediate
4
Uimm[31:12]rdopcodeUpper Immediate
5
Simm[11:5]rs2rs1funct3imm[4:0]opcodeStore
6
B[12]imm[10:5]rs2rs1funct3imm[4:1][11]opcodeBranch
7
J[20]imm[10:1][11]imm[19:12]rdopcodeJump
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9
opcode[4:2]
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opcode[6:5]000001010011100101110111
11
00LOADLOAD-FPCUSTOM-0MISC-MEMOP-IMMAUIPCOP-IMM-32(48b)
AMO: A extension
12
01STORESTORE-FPCUSTOM-1AMOOPLUIOP-32(64b)
OP-IMM-32, OP-32: 64I extension
13
10MADDMSUBNMSUBNMADDOP-FPRESERVEDCUSTOM-2(48b)
[N]MADD, [N]MSUB, LOAD-FP, STORE-FP, OP-FP: F/D/Q extension
14
11BRANCHJALRRESERVEDJALSYSTEMRESERVEDCUSTOM-3(≥80b)
15
16
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opcode[4:2]
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opcode[6:5]000001010011100101110111
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00IICUSTOM-0IIUI(48b)
20
01SSCUSTOM-1RRUR(64b)
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10RRRRRRESERVEDCUSTOM-2(48b)
22
11BJRESERVEDJIRESERVEDCUSTOM-3(≥80b)
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OP and OP-IMM opcodes (funct3)
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000
ADD/SUB
29
001SLL
30
010SLT
Set if less test (signed)
31
011SLTU
Set if less test (unsigned)
32
100XOR
33
101
SRL/SRA
34
110OR
35
111AND
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100
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Sheet1