FMUv5_stm32_pinout
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UARTGPIO (or Alt)StatusDateDescriptionItemWasIs
Approved by
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USARTUSB4/26/2017WIP Rev from RC00 to RC01, pin usage defined, more to come...DBS
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AnalogJTAG or BOOT4/27/2017Posted Rev from RC00 to RC01, Awaiting LM reviewDBS
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Timer PWMSPI4/27/2017Net name changed for clarity and consistencyPG10SPI1_CS_BMI055_ACCSPI1_CS4_BMI055_ACCDBS
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I2C4/28/2017Establish usage of port pinPD15DRDY7SPI5_DRDY7_EXTERNAL1DBS
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CANSDMMC""PH15SpareSPI5_SYNC_EXTERNAL1DBS
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Pinning ConflictsSee Board.H""PB10SparenSPI5_RESET_EXTERNAL1DBS
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4/28/2017Net name changed for clarity and consistencyPC1432.678 Khz32KHZ_INDBS
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Notes are added on the All Pinout Tab
""PC1532.678 Khz32KHZ_OUTDBS
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""PB14
BMI055_DRDY2_GYRO
SPI1_DRDY2_BMI055_GYRO
DBS
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Note the following are Deprecated and the tabs are hidden
""PB15BMI055_DRDY3_ACC
SPI1_DRDY3_BMI055_ACC
DBS
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Deprecated - for Reference only
100-pin STM32F765VIT Signal
Deprecated - for Reference only
100-pin STM32F765VIT FMU USAGE
""PB0RSSIRSSI_INDBS
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Deprecated - for Reference only
144-pin STM32F767ZI Signal
Deprecated - for Reference only
Nuttx-Nucleo-144 usage
Deprecated - for Reference only
144-pin STM32F767ZI FMU USAGE
""PC13
BMI055_DRDY5_GYRO
SPI1_DRDY5_BMI055_GYRO
DBS
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""PD10BMI055_DRDY6_ACC
SPI1_DRDY6_BMI055_ACC
DBS
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Protection Notes:""PB8GPS1_SCLI2C1_SCL_GPS1DBS
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Provide bidirectional transceiver buffering with TXS0108E and 220 ohm series resistors similar to FMUv2""PB9GPS1_SDAI2C1_SDA_GPS1DBS
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Use NUF2042XV6 or equivalent terminator w/ ESD protection for USB port""PH7I2C3_SCLI2C3_SCL_EXTERNAL3DBS
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Prevent back-feeding Dronecode DCD RX FMU input, add Series Schottky w/ Cathode to DCD connector""PH8I2C3_SDAI2C3_SDA_EXTERNAL3DBS
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Prevent back-feeding Dronecode DCD RX PIO input, add Series Schottky w/ Cathode to DCD connector, 10K PU Anode-IO-Vdd""PF14I2C4_SCL_EXTERNALI2C4_SCL_EXTERNAL2DBS
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""PF15I2C4_SDA_EXTERNALI2C4_SDA_EXTERNAL2DBS
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""PC5ICM20602_DRDY4SPI1_DRDY4_ICM20602DBS
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""PB4ICM20689_DRDY1SPI1_DRDY1_ICM20689DBS
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""PC7LED_BLUEnLED_BLUEDBS
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""PC6LED_GREENnLED_GREENDBS
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""PB1LED_REDnLED_REDDBS
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""PF5SPI2_FRAM_CSSPI2_CS_FRAMDBS
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""PI4
SPI5_EXTERNAL1_CS1
SPI5_CS1_EXTERNAL1DBS
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""PI10
SPI5_EXTERNAL1_CS2
SPI5_CS2_EXTERNAL1DBS
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""PI11
SPI5_EXTERNAL1_CS3
SPI5_CS3_EXTERNAL1DBS
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""PI6
SPI6_EXTERNAL2_CS1
SPI6_CS1_EXTERNAL2DBS
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""PI7
SPI6_EXTERNAL2_CS2
SPI6_CS2_EXTERNAL2DBS
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""PI8
SPI6_EXTERNAL2_CS3
SPI6_CS3_EXTERNAL2DBS
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""PH5SPIAUX_MEM_CSSPIAUX_CS_MEMDBS
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""PH12UI_BLUE_LEDnLED_BLUE_EXTERNALDBS
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""PH11UI_GREEN_LEDnLED_GREEN_EXTERNALDBS
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""PH10UI_RED_LEDnLED_RED_EXTERNALDBS
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5/1/2017Added Protection NotesLegend PageUnspecifiedAdded IO, USB, and feedback preventionDCY
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5/12/2017Add clarification on nLED_xxx_EXTERNALPH12
nLED_BLUE_EXTERNAL
[n]LED_BLUE_EXTERNALDBS
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"PH11
nLED_GREEN_EXTERNAL
[n]LED_GREEN_EXTERNALDBS
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"PH10nLED_RED_EXTERNAL[n]LED_RED_EXTERNALDBS
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5/24/2017Removed Extra V in net namePG07
VDD_3V3V_SD_CARD_EN
VDD_3V3_SD_CARD_ENDBS
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6/23/2017PWM LEDs:Added UI prefix and made _EXTERNAL optionalPH[10:12]
[n]LED_<color>_EXTERNAL
[n]UI_LED_<color>[_EXTERNAL]
DBS
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6/23/2017Added Notes for clarification on Status LED usage PB1,PC[6:7]DBS
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9/8/2017Added Reserved HW to HW REV and HW VER TabSWDBS
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4/3/2018PX4IO and debug console UARTs swapped do to DMA mux limitPE0UART8_RX_DEBUGUART8_RX from PX4IOLM
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PX4IO requires DMA on serial. STM32F7 mux did have anPE1UART8_TX_DEBUGUART8_TX to PX4IOLM
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open channel for UART7PE8UART7_TX to PX4IOUART7_TX_DEBUGLM
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PF6UART7_RX from PX4IOUART7_RX_DEBUGLM
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6/19/2018Added Pixhack V5 to HW REV tableR1,R2 valuesNot definedV511
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Added Pixhack V5 to HW ID tableR1,R2 valuesNot definedV511
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Legend
All Pinouts
RC00 to RC01 Changes
144-pin STM32F767ZI + Nucleo
FunctionTakeOff
HW REV and VER ID
ByPkg
 
 
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