ABCDEFGHIJKLMNOPQRSTUVWXYZAAABACAD
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6541
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page bytebytes123
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in specRegFileOffset
size
OffsetTime
Stamps
Mnemoniclengthaccess
type
DescriptionCfgStatusDiagnumIs
TUNE
bit fieldtest of typedriver use
4
1750x2E20x0806LDE_CFG11RWLDE Configuration Register 1
5
1750x2E20x1000LDE_PPINDX2ROLDE Peak Path Index
6
1760x2E20x1002LDE_PPAMPL2ROLDE Peak Path Amplitude
7
1760x2E20x18041LDE_RXANTD2RWLDE Receive Antenna Delay configuration11
8
1760x2E20x1806LDE_CFG22RWLDE Configuration Register 2
9
1770x2E20x2804LDE_REPC2RWLDE Replica Coefficient configuration
10
1740x2E20x0000LDE_THRESH2ROLDE Threshold report
11
1540x2A10x09TC_PG_STATUS2ROTransmitter Calibration – Pulse Generator Status1
12
1670x2C10x0AAON_CFG12RWAON Configuration Register 1
13
1720x2D10x0AOTP_RDAT4ROTP Read Data
14
1820x2F10x0AEVC_FCE2ROFrame Check Sequence Error Counter
15
1480x2810x0BRF_RXCTRLH1RWAnalog RX Control Register1
16
1550x2A10x0BTC_PGDELAY1RWTransmitter Calibration – Pulse Generator Delay11
17
1570x2B10x0BFS_PLLTUNE1RWFrequency synthesiser – PLL Tuning1
18
1950x3610x28PMSC_LEDC4RWPMSC LED Control Register
19
1180x2310x02AGC_CTRL12RWAGC Control #11
20
1380x2710x02DRX_TUNE0b2RWDigital Tuning Register 0b01??
21
1610x2C10x02AON_CTRL1RWAON Control Register
22
1520x2A10x03TC_SARL3ROTransmitter Calibration – Latest SAR readings
23
1640x2C10x03AON_RDAT1RWAON Direct Access Read Data Result
24
1180x2310x04AGC_TUNE12RWAGC Tuning register 111?
25
1230x2410x04EC_RXTC4ROExternal clock counter captured on RMARKER
26
1410x2710x04DRX_TUNE1a2RWDigital Tuning Register 1a11
27
1200x2310x1EAGC_STAT12ROAGC Status111
28
1350x2610x20GPIO_ICLR4RWGPIO Interrupt Latch Clear
29
1430x2710x20DRX_SFDTOC2RWSFD timeout
30
1360x2610x24GPIO_IDBE4RWGPIO Interrupt De-bounce Enable
31
1430x2710x24DRX_PRETOC2RWPreamble detection timeout
32
1870x2F10x24DIAG_TMC2RWTest Mode Control Register
33
1440x2710x26DRX_TUNE4H2RWDigital Tuning Register 4H41
34
1940x3610x26PMSC_TXFSEQ2RWPMSC fine grain TX sequencing control
35
1370x2610x28GPIO_RAW4ROGPIO raw state
36
1450x2710x28DRX_CAR_INT3ROCarrier Recovery Integrator Register
37
1460x2710x2CRXPACC_NOSAT2ROUnsaturated accumulated preamble symbols
38
1490x2810x2CRF_STATUS4RORF Status Register11
39
1500x2810x30--LDOTUNE5RWInternal LDO voltage tuning parameter1
40
630x040--SYS_CFG4RWSystem Configuration bitmap
41
680x080TX_FCTRL5RWTransmit Frame Control Register
42
720x090TX_BUFFER1024WOTransmit Data Buffer
43
740x0D0SYS_CTRL4SRWSystem Control Register
44
770x0E0SYS_MASK4RWSystem Event Mask Register
45
800x0F0SYS_STATUS5SRWSystem Event Status Register1
46
880x100RX_FINFO1RODRX Frame Information Register111
47
920x110RX_BUFFER1024RODRX Frame Data Buffer
48
920x120RX_FQUAL8ROD
49
940x130RX_TTCKI4ROD
Receiver Time Tracking Interval- included in swinging set
50
950x140RX_TTCKO5ROD
Receiver Time Tracking Offset- included in swinging set
51
960x15014RODReceive Time Stamp- included in swinging set----------??
52
990x190SYS_STATE4ROSystem State information
53
1000x1A0ACK_RESP_T4RWAcknowledgement Time and Response Time
54
1020x1501RX_STAMP5RODThe fully adjusted time of reception.--
55
1020x1501RX_TIME14RODReceive Time Stamp- included in swinging set----------???
56
1020x1D0RX_SNIFF4RWSniff Mode Configuration
57
1040x1701TX_STAMP5RO fully adjusted time of transmission
58
1040x1701TX_TIME10ROTransmit Time Stamp----------110
59
1040x180?TX_ANTD2RW16-bit Delay from Transmit to Antenna1--1
60
1080x1F0CHAN_CTRL4RWChannel Control Register
61
1090x1E0--TX_POWER4RWTX Power Control11------110
62
1100x210USR_SFD41RWUser-specified short/long TX/RX SFD sequences
63
1240x250ACC_MEM4096RORead access to accumulator data memory
64
1600x2C0AON_WCFG2RWAON Wakeup Configuration Register
65
1040x1751TX_RAWST5RO Raw Timestamp for the frame.
66
1020x1591RX_RAWST5RODRaw Timestamp for the frame.--
67
600x000x00DEV_ID4RODevice Identifier
68
610x010x00EUI8RWExtended Unique Identifier
69
620x030x00PANADR4RWPAN Identifier and Short Address
70
680x060x00SYS_TIME5ROSystem Time Counter
71
720x0A0x00DX_TIME5RWDelayed Send or Receive Time
72
730x0C0x00RX_FWTO2RWReceive Frame Wait Timeout period
73
1220x240x00EC_CTRL4RWExternal clock synchronisation counter configuration
74
1250x260x00GPIO_MODE4RWGPIO Mode Control Register
75
1460x280x00RF_CONF4RWRF Configuration Register1
76
1510x2A0x00TC_SARC2RWTransmitter Calibration – SAR control
77
1690x2D0x00OTP_WDAT4RWOTP Write Data
78
1790x2F0x00EVC_CTRL4SRWEvent Counter Control
79
1880x360x00PMSC_CTRL04RWPMSC Control Register 01
80
1650x2C0x04AON_ADDR1RWAON Direct Access Address
81
1690x2D0x04OTP_ADDR2RWOTP Address
82
1800x2F0x04EVC_PHE2ROPHR Error Counter1
83
1910x360x041PMSC_CTRL14RWPMSC Control Register 11,
84
1410x270x06DRX_TUNE1b2RWDigital Tuning Register 1b11
85
1530x2A0x06TC_SARW2RO
Transmitter Calibration – SAR readings at last Wake-Up
86
1650x2C0x06AON_CFG04RWAON Configuration Register 0
87
1700x2D0x06OTP_CTRL2RWOTP Control111
88
1810x2F0x06EVC_RSE2RORSD Error Counter
89
1570x2B0x07FS_PLLCFG4RWFrequency synthesiser – PLL configuration1
90
1230x240x08EC_GOLP4ROExternal clock offset to first path 1 GHz counter
91
1280x260x08GPIO_DIR4RWGPIO Direction Control Register
92
1420x270x08DRX_TUNE24RWDigital Tuning Register 221
93
1540x2A0x08TC_PG_CTRL1RWTransmitter Calibration – Pulse Generator Control
94
1710x2D0x08OTP_STAT2RWOTP Status1
95
1810x2F0x08EVC_FCG2ROFrame Check Sequence Good Event Counter----1--
96
1190x230x0cAGC_TUNE24RWAGC Tuning register 221
97
1290x260x0CGPIO_DOUT4RWGPIO Data Output register
98
1480x280x0CRF_TXCTRL3RWAnalog TX Control Register11
99
1560x2A0x0CTC_PGTEST1RWTransmitter Calibration – Pulse Generator Test
100
1820x2F0x0CEVC_FFR2ROFrame Filter Rejection Counter