Table values preparation for S10 paper

	A	B	C	D	E	F	G	H	I
1	Table with Values from Compilation
2
3		ALMs	Logic Registers	Block Memory Bits	M20Ks	DSPs	PINs*	RX/TX channels	HBM GBytes
4	Data Generator	17356.6	26671	206032	267	0		0	0
5	ASIC Emulator	7601.2	16424	45280	24	0		0	0
6	Data Organiser	4784.2	6196	11625477	960	0		0	0
7	High Bandwidth Memory	14152.5	39846	188912	151	0	24	0	2
8	Track Fitter	112059.3	235675	541840	696	424		0	0
9	Monitoring	7897.6	12969	934152	63	0	6	1	0
10	Auto_fab	7519	16549	321056	51	0		0	0
11	i_db_resn	11.6	24	0	0	0		0	0
12	i_reset_release_IP	0	0	0	0	0		0	0
13	i_reset_100_AE	1.1	3	0	0	0		0	0
14	i_reset_100_DG	1.5	3	0	0	0		0	0
15	i_reset_100_DO	0.8	3	0	0	0		0	0
16	i_reset_100_HB	0.6	3	0	0	0		0	0
17	i_reset_100_TF	26.1	3	0	0	0		0	0
18	Integration_top_level**	632	553	0	0	0	20	0	0
19	TOTAL	172044.1	354922	13862749	2212	424	50	1	2
20	TOTAL w/o DG and Emu	147086.3	311827	13611437	1921	424	50	1	2
21	* from the fit report
22	** this is the difference between expeted total and partial sums of the rest
23
24	Expected totals	172044.1	354922
25
26	Same table but with percentages => currently with Devkit
27
28		ALMs	Logic Registers	Block Memory Bits	M20Ks	DSPs	PINs	RX/TX channels	HBM GBytes
29	Data Generator	2.47	0.95	0.15	3.90	0.00	0.00	0.00	0.00
30	ASIC Emulator	1.08	0.58	0.03	0.35	0.00	0.00	0.00	0.00
31	Data Organiser	0.68	0.22	8.29	14.02	0.00	0.00	0.00	0.00
32	High Bandwidth Memory	2.01	1.42	0.13	2.21	0.00	2.16	0.00	25.00
33	Track Fitter	15.95	8.38	0.39	10.17	10.71	0.00	0.00	0.00
34	Monitoring	1.12	0.46	0.67	0.92	0.00	0.54	1.04	0.00
35	Integration top level*	1.17	0.61	0.23	0.74	0.00	1.80	0.00	0.00
36	TOTAL	24.48	12.63	9.89	32.31	10.71	4.50	1.04	25.00
37	TOT w/o DG and ASIC Emu	20.93	11.09	9.71	28.06	10.71	4.50	1.04	25.00
38	* Sum of Integration_top_level + auto_fab (stp?) + deboucer + i_rst_sync..
39
40
41		Totals for devkit S10	Totals for Demo S10*
42	ALM	702720	702720
43	Logic Registers	2810880	2810880
44	HBM GBytes	8	8
45	Pins	1112	872
46	User I/O pins	584	640
47	Block memory bits	140226560	140226560
48	RAM blocks	6847	6847
49	DSP blocks	3960	3960
50	RX channels	96	48
51	TX channels	96	48
52	PLLs	180	100
53	* some values from fit summary of test firmware compilation
54
55	Link to S10 MX resource table
56	https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/pt/stratix-10-mx-product-table.pdf
57
58
59		ALMs (k)	Logic Registers (k)	Block Memory kBits	M20Ks	DSPs	PINs	RX/TX channels	HBM GBytes
60	Data Generator	17.36	26.67	206.03	267.00	0.00	0.16	0.00	0.00
61	ASIC Emulator	7.60	16.42	45.28	24.00	0.00	0.00	0.00	0.00
62	Data Organiser	4.78	6.20	11,625.48	960.00	0.00	0.40	1.09	0.00
63	High Bandwidth Memory	14.15	39.85	188.91	151.00	0.00	0.00	0.00	2.00
64	Track Fitter	112.06	235.68	541.84	696.00	424.00	0.00	0.00	0.00
65	Monitoring	7.90	12.97	934.15	63.00	0.00	0.00	0.00	0.00
66	Integration top level*	8.19	17.14	321.06	51.00	0.00	0.00	0.00	0.00
67	TOTAL	172.04	354.92	13,862.75	2,212.00	424.00	0.57	1.09	2.00
68	TOTAL w/o DG and Emu	147.09	311.83	13,611.44	1,921.00	424.00	0.40	1.09	2.00
69	* Sum of Integration_top_level + auto_fab (stp?) + deboucer + i_rst_sync..
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87	Projections on resource usage to fullfill the requirments
88
89
90
91
92
93
94
95
96
97
98
99
100