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PARALLAX PROPELLER P2 ASSEMBLER INSTRUCTION SUMMARY
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iiiiiizcriccccdddddddddsssssssssInstructionOperand(s)DescriptionZ ResultC ResultR ResultClocksDlyd
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%000000%000pccccdddddddddsssssssssWRBYTED, SWrite from cog D[7..0] to hub byte S[16..0]------Not Written1..8
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%000000%001pccccdddddddddsssssssssRDBYTED, SRead into cog D(0-extended) from hub byte S[16..0]Result = 0---Written3..10
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%000000%011pccccdddddddddsssssssssRDBYTECD, SRead into cog D(0-extended) from hub byte S[16..0] using QuadCacheResult = 0---Written1, 3..10
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%000001%000pccccdddddddddsssssssssWRWORDD, SWrite from cog D[15..0] to hub word S[16..1]------Not Written1..8
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%0000011pccccdddddddddsssssssssRDWORDD, SRead into cog D(0-extended) from hub word S[16..1]Result = 0---Written3..10
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%00000111pccccdddddddddsssssssssRDWORDCD, SRead into cog D(0-extended) from hub word S[16..1] using QuadCacheResult = 0---Written1, 3..10
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%0000100pccccdddddddddsssssssssWRLONGD, SWrite from cog D[31..0] to hub long S[16..2]------Not Written1..8
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%0000101pccccdddddddddsssssssssRDLONGD, SRead into cog D[31..0] from hub long S[16..2]Result = 0---Written3..10
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%00001011pccccdddddddddsssssssssRDLONGCD, SRead into cog D[31..0] from hub long S[16..2] using QuadCacheResult = 0---Written1, 3..10
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%00001101ccccddddddddd%000000000CLKSETDSet CLK to D------Not Written1..8
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%00001111ccccddddddddd%000000001COGIDDGet this COG number (0..7) into D------Written2..9
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%00001101ccccddddddddd%000000011COGSTOPDStop COG number (0..7) in D[2..0]------Not Written1..8
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%000011zc11ccccddddddddd%000000100LOCKNEWDCheckout a new LOCK number (0..7) into DNo LOCK free2..9
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%00001101ccccddddddddd%000000101LOCKRETDReturn LOCK number D[2..0]1..8
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%000011101ccccddddddddd%000000110LOCKSETDSet LOCK number D[2..0]Prev LOCK state2..9
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%000011101ccccddddddddd%000000111LOCKCLRDClear LOCK number D[2..0]Prev LOCK state2..9
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%00001101cccc0%000001000CASHEXInvalidate QuadCache------Not Written1
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%000011zcr1cccc1%000001000CLRACCAZero Multiply Accumulator A (ACCA).
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%000011zcr1cccc10%000001000CLRACCBZero Multiply Accumulator B (ACCB).
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%000011zcr1cccc11%000001000CLRACCSZero both multiply accumulators (accumulator A and B).
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%000011zcr1cccc101%000001000FITACCAShifts accumulator A’s high long right into the low long so that the high long is MSB justified (discarding the low bits). Accumulator A’s high long is then replaced with the number of bit places required to MSB justify Accumulator A’s original value.
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%000011zcr1cccc110%000001000FITACCBShifts accumulator B’s high long right into the low long so that the high long is MSB justified (discarding the low bits). Accumulator B’s high long is then replaced with the number of bit places required to MSB justify Accumulator B’s original value.
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%000011zcr1cccc111%000001000FITACCSSimilar operation to FITACCA/FITACCB. Examines both accumulator A and B and right shifts both accumulators so that the greater value of the two accumulators is MSB justified. The number of bits shifted is written to both accumulator’s high long. This has the effect of scaling both accumulators equally.
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%000011zc01ccccddddddddd%000001001SNDSER DSends a long (D) out of the special chip-to-chip serial port. Blocks until the long is sent. Use C flag to avoid blocking.
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%000011zc11ccccddddddddd%000001001RCVSER DReceives a long (D) in from the special chip-to-chip serial port. Blocks until the long is received. Use C flag to avoid blocking.
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%000011zcr1ccccddddddddd%000001010PUSHZCDPush the Z and C flags into D[1:0] and pop D[31:30] into Z and C through WZ and WC.
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%000011zcr1ccccddddddddd%000001011POPZCDPop D[1:0] into the Z and C flags and push D[31:30] into Z and C through WZ and WC.
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%000011zcr1ccccddddddddd%000001100SUBCNTDSubtracts the system count value when the GETCNT instruction was last executed from the current system count value. Results are stored in the register referenced by “D (0-511)”. If a roll over occurs between accesses TOP-1 is stored.
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%000011zcr1ccccddddddddd%000001101GETCNTDGet D= CNT[31..0]; if repeated immediately gets D= CNT[63..31]
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%000011zcr1ccccddddddddd%000001110GETACCADGet D=ACCA[31..0]; if repeated immediately gets D=ACCA[63..31]
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%000011zcr1ccccddddddddd%000001111GETACCBDGet D=ACCB[31..0]; if repeated immediately gets D=ACCB[63..31]
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%000011zcr1ccccddddddddd%000010000GETLFSRDGet D=LFSR
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%000011z011ccccddddddddd%000010001GETTOPSDGet top bytes of QUADs into DResult = 0---Written1
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%000011zcr1ccccddddddddd%000010010GETPTRADGet PTRA into D, C = PTRA[16]PTRA[16]1
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%000011zcr1ccccddddddddd%000010011GETPTRBDGet PTRB into D, C = PTRB[16]PTRB[16]1
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%000011zcr1ccccddddddddd%000010100GETPIX DGet Texture Pointer address into D
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%000011zc01cccc0%000010101CHKSPDCompare SPA==SPB (CLUT/FIFO stack pointers)SPA==SPBSPA<SPB1
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%000011zc11ccccddddddddd%000010101GETSPDDGet ((SPA-SPB) & 0x7F) into D (CLUT/FIFO stack pointers)SPA==SPBSPA<SPB1
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%000011zc01cccc0%000010110CHKSPACompare SPA==0 (CLUT/FIFO stack pointers)SPA==0SPA[7]1
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%000011zc11ccccddddddddd%000010110GETSPADGet SPA into D (CLUT/FIFO stack pointers)SPA==0SPA[7]1
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%000011zc01cccc0%000010111CHKSPBCompare SPB==0 (CLUT/FIFO stack pointers)SPB==0SPB[7]1
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%000011zc11ccccddddddddd%000010111GETSPBDGet SPB into D (CLUT/FIFO stack pointers)SPB==0SPB[7]1
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%000011zc11ccccddddddddd%000011000POPARDRead CLUT[SPA++] into D (CLUT/FIFO)D[31]1
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%000011zc11ccccddddddddd%000011001POPBRDRead CLUT[SPB++] into D (CLUT/FIFO)D[31]1
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%000011zc11ccccddddddddd%000011010POPADRead CLUT[--SPA] into D (CLUT/FIFO)D[31]1
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%000011zc11ccccddddddddd%000011011POPBDRead CLUT[--SPB] into D (CLUT/FIFO)D[31]1
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%000011zc01cccc0%000011100RETAJump: Set PC=CLUT[--SPA] Flush pipeline(2) (CLUT/FIFO)2+2?
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%000011zc01cccc0%000011101RETBJump: Set PC=CLUT[--SPB] Flush pipeline(2) (CLUT/FIFO)2+2?
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%000011zc01cccc0%000011110RETADDelayed(2) Jump: Set PC=CLUT[--SPA] (CLUT/FIFO)1?2
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%000011zc01cccc0%000011111RETBDDelayed(2) Jump: Set PC=CLUT[--SPB] (CLUT/FIFO)1?2
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%000011zcr1ccccddddddddd%000100000DECOD5DOverwrite D = decoded D[4:0] repeated x1
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%000011zcr1ccccddddddddd100001DECOD4DOverwrite D = decoded D[3:0] repeated x2
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%000011zcr1ccccddddddddd100010DECOD3DOverwrite D = decoded D[2:0] repeated x4
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%000011zcr1ccccddddddddd100011DECOD2DOverwrite D = decoded D[1:0] repeated x8
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%000011zcr1ccccddddddddd100100BLMASKDOverwrite D = bit length mask specified by D[5:0]
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%000011zcr1ccccddddddddd100101NOTDOverwrite D = bitwise inverted D[31..0]
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%000011zcr1ccccddddddddd100110ONECNTDOverwrite D = count of 1's in D[31..0]
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%000011zcr1ccccddddddddd100111ZERCNTDOverwrite D = count of 0's in D[31..0]
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%000011zcr1ccccddddddddd101000INCPATDOverwrite D = next bit pattern with same number of 1's and 0's in D[31..0]
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%000011zcr1ccccddddddddd101001DECPATDOverwrite D = previous bit pattern with same number of 1's and 0's in D[31..0]
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%000011zcr1ccccddddddddd101010BINGRYDOverwrite D = Gray Code of the binary in D[31..0]
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%000011zcr1ccccddddddddd101011GRYBINDOverwrite D = binary of the Gray Code in D[31..0]
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%000011zcr1ccccddddddddd101100MERGEWDOverwrite D = Merge (interleave) high and low words in D[31..0] (low word -> bits 0,2,4+ high word -> bits 1, 3, 5+)
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%000011zcr1ccccddddddddd101101SPLITWDOverwrite D = Split (de-interleave) high and low words in D[31..0] (low word <- bits 0,2,4+ high word <- bits 1, 3, 5+)
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%000011zcr1ccccddddddddd101110SEUSSFDOverwrite D = a pseudo random bit pattern seeded from D[31..0] (after 32 forward iterations, original bit pattern is returned)
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%000011zcr1ccccddddddddd101111SEUSSRDOverwrite D = a pseudo random bit pattern seeded from D[31..0] (after 32 reversed iterations, original bit pattern is returned)
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%000011zcr1ccccddddddddd110000GETMULLDGet MUL[31..0] into D (lower long of 32x32 multiply; waits if not ready)
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%000011zcr1ccccddddddddd110001GETMULHDGet MUL[63..32] into D (higher long of 32x32 multiply; waits if not ready)
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%000011zcr1ccccddddddddd110010GETDIVQDGet QUOTIENT[31..0] into D (quotient of divide; waits if not ready)
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%000011zcr1ccccddddddddd110011GETDIVRDGet REMAINDER[31..0] into D (remainder of divide; waits if not ready)
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%000011zcr1ccccddddddddd110100GETSQRTDGet SQRT[31..0] into D (square root value; waits if not ready)
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%000011zcr1ccccddddddddd110101GETQXDGet CORDIC X into D (waits if not ready)
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%000011zcr1ccccddddddddd110110GETQYDGet CORDIC Y into D (waits if not ready)
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%000011zcr1ccccddddddddd110111GETQZDGet CORDIC Z into D (waits if not ready)
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%000011zcr1ccccddddddddd111000GETPHSADGet PHSA into D
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%000011zcr1ccccddddddddd111001GETPHZADGet PHSA into D and clear PHSA=0
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%000011zcr1ccccddddddddd111010GETCOSADGet COSA into D
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%000011zcr1ccccddddddddd111011GETSINADGet SINA into D
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%000011zcr1ccccddddddddd111100GETPHSBDGet PHSB into D
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%000011zcr1ccccddddddddd111101GETPHZBDGet PHSB into D and clear PHSB=0
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%000011zcr1ccccddddddddd111110GETCOSBDGet COSB into D
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%000011zcr1ccccddddddddd111111GETSINBDGet SINB into D
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%000011zcn1ccccnnnnnnnnn01001mmmmJMPTASKD/#n,#maskSet PC's in mask to 0..511 (r=1 for #n)1
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%000011zcn1ccccnnnnnnnnn0100iiiiiREPDD/#nRepeat D/#n loops of following #i[4..0] instructions Delayed(3)3
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%000011zcn1ccccnnnnnnnnn10100000NOPXD/#nRepeat NOP D/#n times
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%000011zcn1ccccnnnnnnnnn10100001SETZCD/#n,#iSet Z and C flags = D[1:0] using WZ and WC
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%000011zcn1ccccdnnnnnnnn10100010SETSPAD/#nSet SPA = D/#n[7..0] (r=1 for #n)1
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%000011zcn1ccccdnnnnnnnn10100011SETSPBD/#nSet SPB = D/#n[7..0] (r=1 for #n)1
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%000011zcn1ccccdnnnnnnnn10100100ADDSPAD/#nAdd SPA += D/#n[7..0] (r=1 for #n)1
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%000011zcn1ccccdnnnnnnnn10100101ADDSPBD/#nAdd SPB += D/#n[7..0] (r=1 for #n)1
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%000011zcn1ccccdnnnnnnnn10100110SUBSPAD/#nSubtract SPA -= D/#n[7..0] (r=1 for #n)1
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%000011zcn1ccccdnnnnnnnn10100111SUBSPBD/#nSubtract SPB -= D/#n[7..0] (r=1 for #n)1
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%00001101ccccddddddddd10101000PUSHARD/#nPush CLUT[--SPA] = D/#n (r=1 for #n)1 ** +1
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%000011zcn1ccccnnnnnnnnn10101001PUSHBRD/#nPush CLUT[--SPB] = D/#n (r=1 for #n)1..2
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%000011zcn1ccccnnnnnnnnn10101010PUSHAD/#nPush CLUT[SPA++] = D/#n (r=1 for #n)1..2
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%000011zcn1ccccnnnnnnnnn10101011PUSHBD/#nPush CLUT[SPB++] = D/#n (r=1 for #n)1..2
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%000011zcn1ccccnnnnnnnnn10101100CALLAD/#nCall: CLUT[SPA++] = PC, PC = D/#n, flush pipeline(2) (r=1 for #n)4..5?
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%000011zcn1ccccnnnnnnnnn10101101CALLBD/#nCall: CLUT[SPB++] = PC, PC = D/#n, flush pipeline(2) (r=1 for #n)4..5?