Conductance Emulation Based Control for Series Stacked Energy Buffer

Nachiketa Deshmukh Siva Prabhakar Soumya Sahoo Sandeep Anand

IEEE International Conference on

Power Electronics Drives and Energy Systems

16-19 December 2020 Jaipur, Rajasthan, India

Malaviya National Institute of Technology, Jaipur

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Conductance Emulation Based Control for Series Stacked Energy Buffer

• Motivation
• Series stacked energy buffer circuit
• Control objectives and proposed control technique
• Parameter selection and analysis
• Simulation result
• Conclusion and future scope

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Presentation Outline

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Fundamentals of single phase circuits

• Instantaneous ac power in single phase system

Fig. Fundamentals of single phase power conversion

• Ripple energy storage is required

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• Series Stacked Energy Buffer (SSEB)

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• High Efficiency and high power density ripple energy storage

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Problems in existing control techniques

Fig. Series Stacked Energy Buffer (SSEB) circuit with dc source and grid feeding inverter

• DC-Link current based control
• Increase in loop inductance and difficult to implement
• Capacitor voltage based control
• Noise-prone differentiation
• Need - voltage based control without use of differentiator

1. Second + higher order harmonics in dc-link current SSEB circuit
2. Average value of v_c3 at steady state zero
3. SSEB circuit must absorb real power regulate v_C2

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Objectives for the SSEB controller

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Fig. Series Stacked Energy Buffer (SSEB) circuit with dc source and grid feeding inverter

Proposed control technique

Fig. Proposed control technique for SSEB circuit

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Parameter selection: calculation of V_C2*

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Impedance characteristics of SSEB

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Fig. Impedance characteristics of SSEB circuit with proposed conductance emulation control

Impedance characteristics of SSEB

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Simulation Results: Steady state

Fig. Simulation results for steady state operation of proposed control technique showing waveforms for voltages across capacitors v_c1, v_c2, v_c3 (a) at rated inverter power (1000 W) (b) at half of the rated inverter power (500 W)

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Simulation Results: Load transient

Fig. Simulation results for transient performance of proposed control technique (a) waveforms for voltages across capacitors v_c1, v_c2, v_c3 (b) waveforms for source voltage and dc-link voltage

• Proposes conductance emulation based control strategy
• Voltage based strategy without differentiator
• Emulates a conductance across the dc-link of the inverter

- Regulates the real power absorbed by the SSEB circuit

- Regulate the voltage, vc2

• Steady state peak to peak ripple in dc-link voltage = 2.5 %
• Step change in inverter power of 40% of rated value

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Conductance Emulation Based Control for Series Stacked Energy Buffer

Summary and Conclusions