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VLSI 454 PROJECT

GROUP 13

MD. IQBAL KOTHA 1606001

SUJOY MONDAL 1606004

ISHTIAQUE AHMED SHOWMIK 1606035

MD. JAHIN ALAM 1606040

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LOGIC CHARACTERISTICS

  •  
  • TRUTH TABLE:

​

A

B

C

Y

0

0

0

1

0

0

1

1

0

1

0

1

0

1

1

0

1

0

0

0

1

0

1

0

1

1

0

0

1

1

1

0

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TO RECAP…

  •  

Substantially

Greater than

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OUR PRESENTATION FORMAT

SCHEMATIC

SYMBOL

TESTING CKT

PLOT

CLICK INSIDE THESE BOXES TO MAKE

IMAGES APPEAR AND DISAPPEAR

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DAY 8: �LUT WITH SRAM

SCHEMATIC

SYMBOL

TESTING CKT

PLOT

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DAY 8&9: �LOADING CIRCUIT

SCHEMATIC

SYMBOL

TESTING CKT

PLOT

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DAY 12: �CLB+(NOT2)

SCHEMATIC

SYMBOL

TESTING CKT

PLOT

PLOT (ZOOM)

SCH NOT2

SYM NOT2

SRAM

TRUTH-TABLE

A

B

C

Y

0

0

0

1

0

0

1

1

0

1

0

1

0

1

1

0

1

0

0

0

1

0

1

0

1

1

0

0

1

1

1

0

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DAY 6: �MUX LAYOUT

LAYOUT

DRC

LVS

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DAY 11: �INVERTER LAYOUT

LAYOUT

DRC

LVS

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DAY 13: �LUT+FF LAYOUT

LAYOUT

DRC

LVS

LAYOUT

DRC

LVS

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DAY 14: �AND+ NOT2

LAYOUT

DRC

LVS

LAYOUT

DRC

LVS

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DAY 14: �SRAM+LUT_W_SRAM

LAYOUT

DRC

LVS

LAYOUT

DRC

LVS

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DAY 15: �LOADING CIRCUIT

LAYOUT

DRC

LVS

LAYOUT (ZOOM)

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DAY 15: �CLB

LAYOUT

DRC

LVS

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DAY 16: �METRICS 5-8

LOADING TRANSITION PLOT

(ZOOMED)

LOADING ENERGY

METRICS CALC.

LOADING TRANSITION PLOT

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THANK YOU