OCP NIC Community Update�June 2024

�����Sub-group Project wiki: https://www.opencompute.org/wiki/Server/NIC�

Mailing List: https://ocp-all.groups.io/g/OCP-NIC

Agenda

• Review updates between draft 1.4.4 (draft) and 1.4.5 (release)
• Mechanical Updates
• SI Updates
• 2024 OCP Global Summit

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Electrical Workstream - Spec Updates

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High level spec deltas between draft 1.4.4 and 1.4.5

Section 4.3 - DSFF Architectures

• Add reminder cross reference text to maintain continuous RBT hardware arbitration loop

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Section 4.5.1.7 - PCIe Topology

• Add example PCIe topology

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Section 4.5.3.x - SMBus

• SMBus is only defined for use on the Primary Connector for DSFF
• It is routed to both SFF slots
• Add isolation requirement clarification text to match example figure

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Section 4.5.4.x - NC-SI over RBT

• RBT is only defined for use on the Primary Connector for DSFF

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Section 4.5.5.x - Scan Chain

• Scan Chain is only defined for use on the Primary Connector for DSFF

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Section 5.10.3.2 - 0xC1 OEM Record

• Update OEM Record 0xC1, Offset 6 to align changes in Sections 4.5.3, 4.5.4, and 4.5.5

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Section 4.9 - Power State Machine

• Add clarification text for +3.3V_EDGE / +12V_EDGE removal when transitioning to NIC Power Off state

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Section 4.10 - Power Envelopes

• Combine SFF + DSFF Power slots into single table
• DSFF may use all SFF power envelopes.
• Clarify downshifted DSFF cards may use up to SFF power budget.

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Section 4.12 - Power Down Sequence

• Update power down sequencing diagram notes

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Original

Updated

Section 5.9.1 - SMBus Addressing

• Clarify DSFF implementations do not use SLOT_ID[2:3] from the Secondary Connector for setting SMBus/FRU address

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Section 6.1 - RBT Routing Guideline

• Add min prop delay for SFF/DSFF, and LFF to minimize TSKEW on HPM

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Section 6.3.1.2 - PCIe Budget

• Align DSFF Gen5 channel budget to -7.0 dB for SFF + DSFF.
• Clarified gold fingers are part of the HPM side connector model.

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Section 10.x - Revision History

Mechanical Workstream

Backing Plate Concept

• Intel shared backing plate concept
• Can be used in place of an insulator
• Allows for AC caps to be placed closer to gold fingers
• Can have mechanical and thermal benefits
• Spec will require either backing plate or thin insulator
• Bottom side components must always be protected
• Allows NIC vendors more design options
• Proposed that backing plate should not extend below the center slot board edge
• 6.1mm from gold finger edge

DSFF Notch Proposal

• HPE agreed with Dell’s proposed FLW notches and proposed 2 more
• 1 for Class C (SDNO) PCIe HH bracket
• 1 for Class C (SDNO) PCIe FH bracket
• Intel concerned notches greatly limit I/O configurations
• Proposed notches also appear to conflict with SFF cards

DSFF Notch Proposal (cont.)

2 - OCP SFF NIC’s:

2 - 1x4 SFP Cages:

1 - RJ45 & 1 - 1x2 QSFP Cage:

DSFF Notch Proposal (cont.)

• If external serviceability is critical for DSFF in 1U chassis design, Intel proposes only supporting notches for external latch faceplate design leaving internal latch faceplate design without notches to maximize I/O design freedom
• External faceplate design is still WIP, HPE supporting this work

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Mechanical Call to Action

• Goal is to have mechanical revision of spec published by end of Q2
• Need all hands on deck to achieve this goal.
• Need to close on faceplate notches
• Would like to close on external faceplate design

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• Propose compiling mechanical collaterals that are ready by end of WW25 (June 21st)
• Release mechanical draft end of WW26 (June 28th)

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Signal Integrity Workstream

SI Workstream - PCIe Gen 6

• OCP NIC 64GT/s limits will be introduced for public comment this month

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• Workstream focus on PCIe Gen 6 (includes both SFF and DSFF)
• OCP NIC will follow CEM guidelines having a conformance limit and to further set criteria in similar fashion on Insertion Loss, Return Loss, PSNEXT, PSFEXT
• Notables:
• SNIA has published TA-1002 Gen 6 limits on April 29th
• PCI SIG to ratify their limits very soon
• Next meeting is June 11th
• Will review drafted limits with participating workstream members ahead of public release

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• Dell will contribute the DSFF CLB/CBB SI test fixture designs, Gen 6 by default
• Will include dual SFFs, same MMPX connectors used with Gen 5 fixtures

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Call to action

• Vote to approve release 1.4.5

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2024 OCP Global Summit

2024 OCP Global Summit

• October 15-17th - San Jose Convention Center
• Breakout Session:
• Showcase new form-factor reconfigurability in HPM
• Electrical overview
• Mechanical overview
• Signal Integrity overview

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• Experience Center:
• Product demos
• Mechanical Mock ups

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https://www.opencompute.org/summit/global-summit