Design of A 4 Bit Computer Using VerilogHDL

Prasun Datta

ID: 1606148

Section : C

Video Link :

https://web.microsoftstream.com/video/44503f2d-303b-4f06-b3a4-282c5807a93e

PC Architecture At a glance

Memory Unit : RAM

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Input Register

Output Register

Stack Memory

Instruction Execution Unit

03

01

02

04

05

A 2D RAM is created called mypc_ram. Its of size 16*4. There are 16 unique addresses each of size 4 bits.

Two Input Registers called A & B are declared havimg size of 4 bit

Corresponding output registers called mypc_outA & mypc_outB are created. They are also of size 4 bits.

Similarly a stack memory is created called mypcMEM_STACK. This is also of size 16*4

This is the “Nucleus” of the designed 4 bit PC. In this unit instructions are executed sequentially. For implementing this 16 modules are designed according to different assigned tasks.

Unique Features

• Zero Flag (ZF) : This designed 4 bit PC can detect zero bit pattern 0000. Hence during execution of instruction , if we get any zero in the input or output register we can detect it by observing the value of zero flag.Specifically, if we get zero the ZF becomes =1 and otherwise it will remain Zero .

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• Carry Flag: During addition/subtraction operation as well as in the RCL,SHR operation , handling of carry flag is quite important. If any carry is generated, then value of CF will be 1. Otherwise it will remain zero. Hence observing the value of CF we can detect carry bit. �
• Stack_output Register: This is a dedicated output register to show the contents of current stack memory. If any content in pushed in the stack or popped out of the stack, we can keep track of this observing the values of this register. Actually it instantly outputs the value that is pushed in or popped out of the memory,.

Instructions Performed

1. ADD A,B
2. SUB A,B
3. XCHG B,A
4. RCL B

5. SHR A

6. MOV A, [ADDRESS]

7. XOR A,[ADDRESS]

8.AND A,B

9.OR B,[ADDRESS]

10. OUT A

11. JZ ADDRESS

12. PUSH B

13. POP B

14. CALL ADDRESS

15. RET

16. HLT

Intuitions From Waveform File

• A and B are simply taken as input here.
• “Pc_instr” is basically working as the opcode for instruction of a given task. Here we can see that every time the “mypc_clock” pulse gives a positive edge, pc_instr updates its value by one. We need to implement total 16 instructions hence, final value of pc_instr will be 15.This variable triggers the corresponding case module to perform the task.
• ADDRESS is basically the pointer to access data stored in the RAM. We will use this ADDRESS as an index to access memory data and perform various operations with the data.

Illustration of Timing Diagram

Instruction: 1 to 5

Illustration of Timing Diagram

Instruction: 6 to 10

Illustration of Timing Diagram

Instruction: 11 to 13

Illustration of Timing Diagram

Instruction: 14 to 16

Thank You !!!