Dependability: Parity, ECC, RAID
Instructor: Morgan Rae Reschenberg
Systems & Fault Tolerance
How can we ensure the systems we’ve developed function reliably (or predictably) in the face of failure?
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Measurements of Fault Tolerance, Mitigations
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Agenda
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What is Dependability?
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Dependability
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Service accomplishment
Service delivered�as specified
Service interruption
Deviation from�specified service
Failure
Recovery
Dependability Measures
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Reliability Measures
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Total disk failures/yr
Availability Measures
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Dependability Example
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300,300 hours
100,000 hr
100,000 hr
100,000 hr
100,100 hours
FAILURE
FAILURE
Dependability Example
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= MTTR + MTTF = 100,100 hr
= MTTF/MTBF = 0.9990 = 99.9%
300,300 hours
100,000 hr
100,000 hr
100,000 hr
100,100 hours
FAILURE
FAILURE
Calculating MTTR Example
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Dependability Design Principle
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Question: There’s a hardware glitch in our system that makes the Mean Time To Failure (MTTF) decrease. Are the following statements TRUE or FALSE?
F F
(A)
F T
(B)
T F
(C)
T T
(D)
1 2
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Question: There’s a hardware glitch in our system that makes the Mean Time To Failure (MTTF) decrease. Are the following statements TRUE or FALSE?
F F
(A)
F T
(B)
T F
(C)
T T
(D)
1 2
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Question: There’s a hardware glitch in our system that makes the Mean Time To Failure (MTTF) decrease. Are the following statements TRUE or FALSE?
F F
(A)
F T
(B)
T F
(C)
T T
(D)
1 2
Availability = MTTF / (MTTF + MTTR)
As MTTF shrinks, our fraction is outweighed by MTTR:
100/(100 + 50) → 66%
50/(50 + 50) → 50%
10/(10 + 50) → 16%
Availability decreases (less 9’s, lower percentage)
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Question: There’s a hardware glitch in our system that makes the Mean Time To Failure (MTTF) decrease. Are the following statements TRUE or FALSE?
F F
(A)
F T
(B)
T F
(C)
T T
(D)
1 2
MTTF = “Mean time to Failure” = average time until something goes wrong!
If this number /decreases/, this means failures happen more often!
100 years until failure, 50 years until failure, 10 years until failure, etc.
Failures happening more often == an increased rate of failures per year
As MTTF decreases, AFR increases
Administrivia
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7/30/2018
What’s next?
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Monday | Tuesday | Wednesday | Thursday | Friday |
Summary Lecture 9:30-11:00 AM | James Percy (Apple) 9:30-11:00 AM | Sophia Shao (UC Berkeley)�9:30-11:00 AM | Final Exam 9:30-12:30 AM��Valley Life Sciences Building,�Room 2050 | Class is over!!! : ( |
Discussions as normal | Labs for last checkoffs | Discussions are open office hours | ||
Review sessions 5:00-8:00 PM | Review sessions 5:00-8:00 PM | | |
Agenda
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Great Idea: Dependability �via Redundancy
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1+1=2
1+1=2
1+1=1
1+1=2
2 of 3 agree
FAIL!
Great Idea: Dependability �via Redundancy
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Error Detection/Correction Codes
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Error Detection/Correction Codes
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Detecting/Correcting Code Concept
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Space of all possible bit patterns:
2N patterns, but only 2M are valid code words (N>M)
Error changes bit pattern to
an invalid code word.
Correction: fixes invalid code word to back to valid
Hamming Distance
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Richard Hamming (1915-98)
Turing Award Winner
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Why does this matter?
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3-Bit Visualization Aid
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Bit 0
Bit 1
Bit 2
Minimum Hamming Distance 2
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Let 000 be valid
Half the available�code words�are valid
Minimum Hamming Distance 3
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Let 000 be valid
Only a quarter of �the available code�words are valid
Nearest 000
(one 1)
Nearest 111
(one 0)
Parity Bit
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Parity: Simple Error Detection Coding
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b7b6b5b4b3b2b1b0p
+
b7b6b5b4b3b2b1b0p
error
+
Parity Examples
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How to Correct 1-bit Error?
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Hamming ECC (1/2)
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Hamming ECC
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D1
D2
D3
D4
D5
D6
P1
P2
D1
P4
D2
D3
D4
D5
D6
P8
Hamming ECC (2/2)
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Hamming ECC
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P1
P2
D1
P4
D2
D3
D4
D5
D6
D1
D2
D3
D4
D5
D6
P8
XOR
Hamming ECC
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P1
P2
D1
P4
D2
D3
D4
D5
D6
D1
D2
D3
D4
D5
D6
P8
XOR
Hamming ECC Example
_1 _2 13 _4 05 06 17 _8 19 010 111 012
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Hamming ECC Example
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0
1
0
1
?
?
?
?
?
?
Hamming ECC Example
Suppose we read 011213140506170819110111012 instead – fix the error!
But how would we figure out where the error is if we just see the code word? Hmm….
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Hamming ECC Example
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Graphic of Hamming Code
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0 1 1 1 0 0 1 0 1 1 1 0
Hamming ECC Example
Suppose we see 011213140506170819110111012 instead – fix the error!
How to figure out where the error is? Hmm….
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Hold on…
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1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
OMFG
The parity bits form a number—the bit position in the code word!
Replace all the X’s with 1’s
Everywhere else, put a 0
…
Hamming ECC Example
Going in reverse:
We see 011213140506170819110111012
Figure out which bit is wrong:
p1: 0113051719111 = even number of 1’s : 0
p2: 12130617110111 = odd number of 1’s : 1
p4: 14050617012 = even number of 1’s: 0
p8: 0819110111012 = odd number of 1’s : 1
Incorrect code bit:
0b p8p4p2p1 = 0b 1010 = 10! So flip bit 10
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RAID: Redundant Array of �Inexpensive/Independent Disks
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RAID 0: Data Striping
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10010011
11001101
…
logical record
1
0
1
1
0
0
1
1
1
1
0
1
0
1
0
0
striped
physical
records
RAID 1: Disk Mirroring
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recovery
group
RAID 2-4: Data Striping + Parity
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P0-2
P3-5
P6-8
P
X
Y
Z
D0
D3
D6
D1
D4
D7
D2
D5
D8
Updating the Parity Data
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D0
D1
D2
D3
P
D0’
new
data
+
old data
(1. Read)
XOR
1 only if bit changed
old parity
(2. Read)
flip if changed
+
XOR
D0’ | D0 | P | P’ |
0 | 0 | 0 | |
0 | 0 | 1 | |
0 | 1 | 0 | |
0 | 1 | 1 | |
1 | 0 | 0 | |
1 | 0 | 1 | |
1 | 1 | 0 | |
1 | 1 | 1 | |
|
0 |
1 |
1 |
0 |
1 |
0 |
0 |
1 |
D0’
D1
D2
D3
(3. Write)
P
(4. Write)
P’
What if writing halfword (2 B)?
Word (4 B)?
Inspiration for RAID 5
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D0
D1
D2
D3
P
D4
D5
D6
P
D7
RAID 5: Interleaved Parity
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Independent writes
possible because of
interleaved parity
D0
D1
D2
D3
P
D4
D5
D6
P
D7
D8
D9
P
D10
D11
D12
P
D13
D14
D15
P
D16
D17
D18
D19
D20
D21
D22
D23
P
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Disk Columns
Increasing
Logical
Disk
Addresses
Example: write to D0, D5 uses disks 1, 2, 4, 5
Modern Use of RAID and ECC (1/2)
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Modern Use of RAID and ECC (2/2)
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Summary
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Hamming ECC “Cost”
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Hamming Single Error Correction, �Double Error Detection (SEC/DED)
1 2 3 4 5 6 7 8
p1 p2 d3 p4 d5 d6 d7 p8
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Question: We saw that when the minimum hamming distance of codewords was 3, we get single error detection and correction. If we had a hamming distance of 4, we’d have
A) 1, 2�B) 1, 3�C) 1, 2, 3�D) 1, 2, 3 ,4
SEC/DED: Hamming Distance 4
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1-bit error (one 1)
Nearest 0000
1-bit error (one 0)
Nearest 1111
2-bit error �(two 0’s, two 1’s)
halfway between