Chapter 11 Storage
Input/Output
Processor
Computer
Control
Datapath
Memory
Devices
Input
Output
Processor
Computer
Control
Datapath
Memory
Devices
Input
Output
Network
Impact of I/O on System Performance
Suppose we have a benchmark that executes in 100 seconds of elapsed time, where 90 seconds is CPU time and the rest is I/O time. If the CPU time improves by 50% per year for the next five years but I/O time does not improve, how much faster will our program run at the end of the five years?
Answer: Elapsed Time = CPU time + I/O time
Over five years:
CPU improvement = 90/12 = 7. BUT System improvement = 100/22 = 4.5
Typical I/O System
Processor
Cache
Memory - I/O Bus
Main
Memory
I/O
Controller
Disk
Disk
I/O
Controller
I/O
Controller
Graphics
Network
interrupts
I/O Device Examples
Device Behavior Partner Data Rate (KB/sec)
Keyboard Input Human 0.01
Mouse Input Human 0.02
Line Printer Output Human 1.00
Floppy disk Storage Machine 50.00
Laser Printer Output Human 100.00
Optical Disk Storage Machine 500.00
Magnetic Disk Storage Machine 5,000.00
Network-LAN Input or Output Machine 20 – 1,000.00
Graphics Display Output Human 30,000.00
Disk History
Data density in
Mbit/square inch
Capacity of Unit Shown in Megabytes
source: New York Times, 2/23/98, page C3
Organization of a Hard Magnetic Disk
Platters
Track
Sector
Magnetic Disk Operation
Cylinder
Sector
Track
Head
Platter
Magnetic Disk Characteristic
Example
Calculate the access time for a disk with 512 byte/sector and 12 ms advertised seek time. The disk rotates at 5400 RPM and transfers data at a rate of 4MB/sec. The controller overhead is 1 ms. Assume that the queue is idle (so no service time)
Answer:
Disk Access Time = Seek time + Rotational Latency + Transfer time
+ Controller Time + Queuing Delay
= 12 ms + 0.5 / 5400 RPM + 0.5 KB / 4 MB/s + 1 ms + 0
= 12 ms + 0.5 / 90 RPS + 0.125 / 1024 s + 1 ms + 0
= 12 ms + 5.5 ms + 0.1 ms + 1 ms + 0 ms
= 18.6 ms
If real seeks are 1/3 the advertised seeks, disk access time would be
10.6 ms, with rotation delay contributing 50% of the access time!
Historical Trend
Characteristics IBM 3090 IBM UltraStar Integral 1820
Disk diameter (inches) 10.88 3.50 1.80
Formatted data capacity (MB) 22,700 4,300 21
MTTF (hours) 50,000 1,000,000 100,000
Number of arms/box 12 1 1
Rotation speed (RPM) 3,600 7,200 3,800
Transfer rate (MB/sec) 4.2 9-12 1.9
Power/box (watts) 2,900 13 2
MB/watt 8 102 10.5
Volume (cubic feet) 97 0.13 0.02
MB/cubic feet 234 33000 1050
Reliability and Availability
Disk Arrays
Manufacturing Advantages of Disk Arrays
14”
10”
5.25”
3.5”
3.5”
Disk Array: 1 disk design
Conventional: 4 disk designs
Low End
High End
Disk Product Families
Replace Small # of Large Disks with Large # of Small Disks!
Redundant Arrays of Disks
RAID 1: Disk Mirroring/Shadowing
Targeted for high I/O rate , high availability environments
recovery
group
RAID 3: Parity Disk
P
10010011
11001101
10010011
. . .
logical record
1
0
0
1
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
1
0
0
1
1
0
0
1
1
0
0
0
0
Striped physical
records
capacity costs, decrease expected availability, increase reconstruction time
(logically a single high capacity, high transfer rate disk)
Targeted for high bandwidth applications: Scientific, Image Processing
RAID 5 : Striping with Parity
Key Features of RAID 5:
Block-Based Parity
of a disk failure
parallelism of disk access
RAID 4
RAID 5
RAID 5+: High I/O Rate Parity
A logical write
becomes four
physical I/Os
Independent writes
possible because of
interleaved parity
Reed-Solomon
Codes ("Q") for
protection during
reconstruction
D0
D1
D2
D3
P
D4
D5
D6
P
D7
D8
D9
P
D10
D11
D12
P
D13
D14
D15
P
D16
D17
D18
D19
D20
D21
D22
D23
P
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Disk Columns
Increasing
Logical
Disk
Addresses
Stripe
Stripe
Unit
Targeted for mixed
applications
Problems of Small Writes
D0
D1
D2
D3
P
D0'
+
+
D0'
D1
D2
D3
P'
new
data
old
data
old
parity
XOR
XOR
(1. Read)
(2. Read)
(3. Write)
(4. Write)
RAID-5: Small Write Algorithm
1 Logical Write = 2 Physical Reads + 2 Physical Writes
Subsystem Organization
host
array
controller
single board
disk
controller
single board
disk
controller
single board
disk
controller
single board
disk
controller
host
adapter
manages interface
to host, DMA
control, buffering,
parity logic
physical device
control
often piggy-backed
in small format devices
striping software off-loaded from
host to array controller
no applications modifications
no reduction of host performance
System Availability: Orthogonal RAIDs
Array
Controller
String
Controller
String
Controller
String
Controller
String
Controller
String
Controller
String
Controller
. . .
. . .
. . .
. . .
. . .
. . .
Polling: Programmed I/O
CPU
IOC
device
Memory
Is the
data
ready?
read
data
store
data
yes
no
done?
no
yes
busy wait loop
not an efficient
way to use the CPU
unless the device
is very fast!
but checks for I/O
completion can be
dispersed among
computation
intensive code
Interrupt Driven Data Transfer
add
sub
and
or
nop
read
store
...
rti
memory
user
program
(1) I/O
interrupt
(2) save PC
(3) interrupt
service addr
interrupt
service
routine
(4)
CPU
IOC
device
Memory
:
I/O Interrupt vs. Exception
Direct Memory Access
CPU
IOC
device
Memory
DMAC
CPU sends a starting address,
direction, and length count
to DMAC. Then issues "start".
DMAC provides handshake
signals for Peripheral
Controller, and Memory
Addresses and handshake
signals for Memory.
For multiple bus system, each bus controller often contains DMA control logic
Solutions:
Solutions:
to I/O write
DMA Problems
DMA allows another path to main memory with no cache and address translation
I/O Processor
CPU
IOP
Mem
D1
D2
Dn
. . .
main memory
bus
I/O
bus
CPU
IOP
(1) Issues
instruction
to IOP
memory
(2)
(3)
Device to/from memory
transfers are controlled
by the IOP directly.
IOP steals memory cycles.
OP Device Address
target device
where cmnds are
IOP looks in memory for commands
OP Addr Cnt Other
what
to do
where
to put
data
how
much
special
requests
(4) IOP interrupts
CPU when done
Motorola 860, include special purpose
IOP for serial communication