�Registers and RTL
1
1
Henry Hexmoor
REGISTER TRANSFER AND MICROOPERATIONS
• Register Transfer Language
• Register Transfer
• Bus and Memory Transfers
• Arithmetic Microoperations
• Logic Microoperations
• Shift Microoperations
• Arithmetic Logic Shift Unit
2
Henry Hexmoor
SIMPLE DIGITAL SYSTEMS
3
Henry Hexmoor
MICROOPERATIONS (1)
Register Transfer Language
4
Henry Hexmoor
MICROOPERATION (2)
An elementary operation performed (during
one clock pulse), on the information stored
in one or more registers
R ← f(R, R)
f: shift, load, clear, increment, add, subtract, complement,
and, or, xor, …
ALU
(f)
Registers
(R)
1 clock cycle
Register Transfer Language
5
Henry Hexmoor
ORGANIZATION OF A DIGITAL SYSTEM
- Set of registers and their functions
- Microoperations set
Set of allowable microoperations provided
by the organization of the computer
- Control signals that initiate the sequence of
microoperations (to perform the functions)
Register Transfer Language
6
Henry Hexmoor
REGISTER TRANSFER LEVEL
Register Transfer Language
7
Henry Hexmoor
REGISTER TRANSFER LANGUAGE
Register Transfer Language
8
Henry Hexmoor
DESIGNATION OF REGISTERS
Register Transfer Language
MAR
9
Henry Hexmoor
DESIGNATION OF REGISTERS
Register Transfer Language
R1
Register
Numbering of bits
Showing individual bits
Subfields
PC(H)
PC(L)
15
8
7
0
- a register
- portion of a register
- a bit of a register
7 6 5 4 3 2 1 0
R2
15
0
10
Henry Hexmoor
REGISTER TRANSFER
R2 ← R1
Register Transfer
11
Henry Hexmoor
REGISTER TRANSFER
R3 ← R5
Implies that the digital system has
Register Transfer
12
Henry Hexmoor
CONTROL FUNCTIONS
P: R2 ← R1
Which means “if P = 1, then load the contents of register R1 into register R2”, i.e., if (P = 1) then (R2 ← R1)
Register Transfer
13
Henry Hexmoor
HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS
Implementation of controlled transfer
P: R2 ← R1
Block diagram
Timing diagram
Clock
Register Transfer
Transfer occurs here
R2
R1
Control
Circuit
Load
P
n
Clock
Load
t
t+1
and the destination register
14
Henry Hexmoor
SIMULTANEOUS OPERATIONS
P: R3 ← R5, MAR ← IR
Register Transfer
15
Henry Hexmoor
BASIC SYMBOLS FOR REGISTER TRANSFERS
Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
Arrow ← Denotes transfer of information R2 ← R1
Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A ← B, B ← A
Symbols
Description Examples
Register Transfer
16
Henry Hexmoor
CONNECTING REGISTRS
Register Transfer
17
Henry Hexmoor
BUS AND BUS TRANSFER
Bus is a path(of a group of wires) over which information is transferred, from any of several sources to any of several destinations.
From a register to bus: BUS ← R
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
Register A
Register B
Register C
Register D
B
C
D
1
1
1
4 x1
MUX
B
C
D
2
2
2
4 x1
MUX
B
C
D
3
3
3
4 x1
MUX
B
C
D
4
4
4
4 x1
MUX
4-line bus
x
y
select
0
0
0
0
Register A
Register B
Register C
Register D
Bus lines
Bus and Memory Transfers
18
Henry Hexmoor
TRANSFER FROM BUS TO A DESTINATION REGISTER
Three-State Bus Buffers
Bus line with three-state buffers
Reg. R0
Reg. R1
Reg. R2
Reg. R3
Bus lines
2 x 4
Decoder
Load
D
0
D
1
D
2
D
3
z
w
Select
E (enable)
Output Y=A if C=1
High-impedence if C=0
Normal input A
Control input C
Select
Enable
0
1
2
3
S0
S1
A0
B0
C0
D0
Bus line for bit 0
Bus and Memory Transfers
19
Henry Hexmoor
BUS TRANSFER IN RTL
or
Bus and Memory Transfers
R2 ← R1
BUS ← R1, R2 ← BUS
20
Henry Hexmoor
MEMORY (RAM)
Bus and Memory Transfers
data input lines
data output lines
n
n
k
address lines
Read
Write
RAM
unit
21
Henry Hexmoor
MEMORY TRANSFER
Bus and Memory Transfers
AR
Memory
unit
Read
Write
Data in
Data out
M
22
Henry Hexmoor
MEMORY READ
Bus and Memory Transfers
R1 ← M[MAR]
23
Henry Hexmoor
MEMORY WRITE
Bus and Memory Transfers
M[MAR] ← R1
24
Henry Hexmoor
SUMMARY OF R. TRANSFER MICROOPERATIONS
Bus and Memory Transfers
A ← B Transfer content of reg. B into reg. A
AR ← DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A ← constant Transfer a binary constant into reg. A
ABUS ← R1, Transfer content of R1 into bus A and, at the same time,
R2 ← ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR ← M Memory read operation: transfers content of
memory word specified by AR into DR
M ← DR Memory write operation: transfers content of
DR into memory word specified by AR
25
Henry Hexmoor
MICROOPERATIONS
- Register transfer microoperations
- Arithmetic microoperations
- Logic microoperations
- Shift microoperations
Arithmetic Microoperations
26
Henry Hexmoor
ARITHMETIC MICROOPERATIONS
Summary of Typical Arithmetic Micro-Operations
Arithmetic Microoperations
R3 ← R1 + R2 Contents of R1 plus R2 transferred to R3
R3 ← R1 - R2 Contents of R1 minus R2 transferred to R3
R2 ← R2’ Complement the contents of R2
R2 ← R2’+ 1 2's complement the contents of R2 (negate)
R3 ← R1 + R2’+ 1 subtraction
R1 ← R1 + 1 Increment
R1 ← R1 - 1 Decrement
27
Henry Hexmoor
BINARY ADDER / SUBTRACTOR / INCREMENTER
Binary Adder-Subtractor
Binary Incrementer
Binary Adder
Arithmetic Microoperations
28
Henry Hexmoor
ARITHMETIC CIRCUIT
S1
S0
0
1
2
3
4x1
MUX
X0
Y0
C0
C1
D0
FA
S1
S0
0
1
2
3
4x1
MUX
X1
Y1
C1
C2
D1
FA
S1
S0
0
1
2
3
4x1
MUX
X2
Y2
C2
C3
D2
FA
S1
S0
0
1
2
3
4x1
MUX
X3
Y3
C3
C4
D3
FA
Cout
A0
B0
A1
B1
A2
B2
A3
B3
0
1
S0
S1
Cin
S1 S0 Cin Y Output Microoperation
0 0 0 B D = A + B Add
0 0 1 B D = A + B + 1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D = A Transfer A
1 0 1 0 D = A + 1 Increment A
1 1 0 1 D = A - 1 Decrement A
1 1 1 1 D = A Transfer A
Arithmetic Microoperations
29
Henry Hexmoor
LOGIC MICROOPERATIONS
Logic Microoperations
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1
A B F0 F1 F2 … F13 F14 F15
30
Henry Hexmoor
LIST OF LOGIC MICROOPERATIONS
- 16 different logic operations with 2 binary vars.
- n binary vars → functions
2
2
n
corresponding 16 logic micro-operations
Boolean
Function
Micro-
Operations
Name
x 0 0 1 1
y 0 1 0 1
Logic Microoperations
0 0 0 0 F0 = 0 F ← 0 Clear
0 0 0 1 F1 = xy F ← A ∧ B AND
0 0 1 0 F2 = xy' F ← A ∧ B’
0 0 1 1 F3 = x F ← A Transfer A
0 1 0 0 F4 = x'y F ← A’∧ B
0 1 0 1 F5 = y F ← B Transfer B
0 1 1 0 F6 = x ⊕ y F ← A ⊕ B Exclusive-OR
0 1 1 1 F7 = x + y F ← A ∨ B OR
1 0 0 0 F8 = (x + y)' F ← (A ∨ B)’ NOR
1 0 0 1 F9 = (x ⊕ y)' F ← (A ⊕ B)’ Exclusive-NOR
1 0 1 0 F10 = y' F ← B’ Complement B
1 0 1 1 F11 = x + y' F ← A ∨ B
1 1 0 0 F12 = x' F ← A’ Complement A
1 1 0 1 F13 = x' + y F ← A’∨ B
1 1 1 0 F14 = (xy)' F ← (A ∧ B)’ NAND
1 1 1 1 F15 = 1 F ← all 1's Set to all 1's
31
Henry Hexmoor
HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS
0 0 F = A ∧ B AND
0 1 F = A ∨ B OR
1 0 F = A ⊕ B XOR
1 1 F = A’ Complement
S1 S0
Output
μ-operation
Function table
Logic Microoperations
B
A
S
S
F
1
0
i
i
i
0
1
2
3
4 X 1
MUX
Select
32
Henry Hexmoor
APPLICATIONS OF LOGIC MICROOPERATIONS
Logic Microoperations
33
Henry Hexmoor
SELECTIVE SET
1 1 0 0 At
1 0 1 0 B
1 1 1 0 At+1 (A ← A + B)
Logic Microoperations
34
Henry Hexmoor
SELECTIVE COMPLEMENT
1 1 0 0 At
1 0 1 0 B
0 1 1 0 At+1 (A ← A ⊕ B)
Logic Microoperations
35
Henry Hexmoor
SELECTIVE CLEAR
1 1 0 0 At
1 0 1 0 B
0 1 0 0 At+1 (A ← A ⋅ B’)
Logic Microoperations
36
Henry Hexmoor
MASK OPERATION
1 1 0 0 At
1 0 1 0 B
1 0 0 0 At+1 (A ← A ⋅ B)
Logic Microoperations
37
Henry Hexmoor
CLEAR OPERATION
1 1 0 0 At
1 0 1 0 B
0 1 1 0 At+1 (A ← A ⊕ B)
Logic Microoperations
38
Henry Hexmoor
INSERT OPERATION
1111 1111 1111 0000 Mask
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)
Logic Microoperations
39
Henry Hexmoor
LOGICAL SHIFT
Shift Microoperations
0
0
40
Henry Hexmoor
CIRCULAR SHIFT
Shift Microoperations
41
Henry Hexmoor
Logical versus Arithmetic Shift
42
Henry Hexmoor
ARITHMETIC SHIFT
Shift Microoperations
0
V
Before the shift, if the leftmost two
bits differ, the shift will result in an
overflow
sign
bit
43
Henry Hexmoor
HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS
Shift Microoperations
S
0
1
H0
MUX
S
0
1
H1
MUX
S
0
1
H2
MUX
S
0
1
H3
MUX
Select
0 for shift right (down)
1 for shift left (up)
Serial
input (IR)
A0
A1
A2
A3
Serial
input (IL)
44
Henry Hexmoor
ARITHMETIC LOGIC SHIFT UNIT
S3 S2 S1 S0 Cin Operation Function
0 0 0 0 0 F = A Transfer A
0 0 0 0 1 F = A + 1 Increment A
0 0 0 1 0 F = A + B Addition
0 0 0 1 1 F = A + B + 1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F = A - 1 Decrement A
0 0 1 1 1 F = A TransferA
0 1 0 0 X F = A ∧ B AND
0 1 0 1 X F = A ∨ B OR
0 1 1 0 X F = A ⊕ B XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F
Shift Microoperations
Arithmetic
Circuit
Logic
Circuit
C
C
4 x 1
MUX
Select
0
1
2
3
F
S3
S2
S1
S0
B
A
i
A
D
A
E
shr
shl
i+1
i
i
i
i+1
i-1
i
i
45
Henry Hexmoor
HW 7
1. Use D-type flip flops and gates to design a counter with the following repeated binary sequence: 0, 1, 3, 2, 4, 6.
46
Henry Hexmoor