Introduction to�8086 Microprocessor
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Microprocessor
Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions.
It is used as CPU (Central Processing Unit) in computers.
Functional blocks
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Microprocessor
Flag Register
Timing and control unit
Register array or internal memory
Instruction decoding unit
PC/ IP
ALU
Control Bus
Address Bus
Data Bus
Computational Unit; performs arithmetic and logic operations
Various conditions of the results are stored as status bits called flags in flag register
Internal storage of data
Generates the address of the instructions to be fetched from the memory and send through address bus to the memory
Decodes instructions; sends information to the timing and control unit
Generates control signals for internal and external operations of the microprocessor
Overview
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8086 Microprocessor
First 16- bit processor released by INTEL in the year 1978
Originally HMOS, now manufactured using HMOS III technique
Approximately 29, 000 transistors, 40 pin DIP, 5V supply
Does not have internal clock; external asymmetric clock source with 33% duty cycle
20-bit address to access memory ⇒ can address up to 220 = 1 megabytes of memory space.
Pins and signals
Pins and Signals
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8086 Microprocessor
Common signals
AD0-AD15 (Bidirectional)
Address/Data bus
Low order address bus; these are multiplexed with data.
When AD lines are used to transmit memory address the symbol A is used instead of AD, for example A0-A15.
When data are transmitted over AD lines the symbol D is used in place of AD, for example D0-D7, D8-D15 or D0-D15.
A16/S3, A17/S4, A18/S5, A19/S6
High order address bus. These are multiplexed with status signals
Pins and Signals
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8086 Microprocessor
Common signals
BHE (Active Low)/S7 (Output)
Bus High Enable/Status
It is used to enable data onto the most significant half of data bus, D8-D15. 8-bit device connected to upper half of the data bus use BHE (Active Low) signal. It is multiplexed with status signal S7.
MN/ MX
MINIMUM / MAXIMUM
This pin signal indicates what mode the processor is to operate in.
RD (Read) (Active Low)
The signal is used for read operation.
It is an output signal.
It is active when low.
Pins and Signals
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8086 Microprocessor
Common signals
READY
This is the acknowledgement from the slow device or memory that they have completed the data transfer.
The signal made available by the devices is synchronized by the 8284A clock generator to provide ready input to the 8086.
The signal is active high.
Pins and Signals
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8086 Microprocessor
Common signals
RESET (Input)
Causes the processor to immediately terminate its present activity.
The signal must be active HIGH for at least four clock cycles.
CLK
The clock input provides the basic timing for processor operation and bus control activity. Its an asymmetric square wave with 33% duty cycle.
INTR Interrupt Request
This is a triggered input. This is sampled during the last clock cycles of each instruction to determine the availability of the request. If any interrupt request is pending, the processor enters the interrupt acknowledge cycle.
This signal is active high and internally synchronized.
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Pins and Signals
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8086 Microprocessor
Min/ Max Pins
The 8086 microprocessor can work in two modes of operations : Minimum mode and Maximum mode.
In the minimum mode of operation the microprocessor do not associate with any co-processors and can not be used for multiprocessor systems.
In the maximum mode the 8086 can work in multi-processor or co-processor configuration.
Minimum or maximum mode operations are decided by the pin MN/ MX(Active low).
When this pin is high 8086 operates in minimum mode otherwise it operates in Maximum mode.
Pins and Signals
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8086 Microprocessor
| (Data Transmit/ Receive) Output signal from the processor to control the direction of data flow through the data transceivers |
| (Data Enable) Output signal from the processor used as out put enable for the transceivers |
ALE | (Address Latch Enable) Used to demultiplex the address and data lines using external latches |
| Used to differentiate memory access and I/O access. For memory reference instructions, it is high. For IN and OUT instructions, it is low. |
| Write control signal; asserted low Whenever processor writes data to memory or I/O port |
| (Interrupt Acknowledge) When the interrupt request is accepted by the processor, the output is low on this line. |
Minimum mode signals
Pins and Signals
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8086 Microprocessor
HOLD | Input signal to the processor form the bus masters as a request to grant the control of the bus. Usually used by the DMA controller to get the control of the bus. |
HLDA | (Hold Acknowledge) Acknowledge signal by the processor to the bus master requesting the control of the bus through HOLD. The acknowledge is asserted high, when the processor accepts HOLD. |
Minimum mode signals
Pins and Signals
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8086 Microprocessor
| Status signals; used by the 8086 bus controller to generate bus timing and control signals. These are decoded as shown. |
Maximum mode signals
Pins and Signals
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8086 Microprocessor
| (Queue Status) The processor provides the status of queue in these lines. The queue status can be used by external device to track the internal status of the queue in 8086. The output on QS0 and QS1 can be interpreted as shown in the table. |
Maximum mode signals
Pins and Signals
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8086 Microprocessor
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Maximum mode signals