� ISA�Instructure Set Archiceture
Presented By
Dr. Abhaya Kumar Sahoo
Computer Science &Engineering
KIIT University
OUTLINE
Pipelining Hardware
INTRODUCTION
The instruction set is the hardware language that tells the processor what to do.
BACKGROUND AND HISTORY
CHARACTERSTICS OF RISC
CISC vs. RISC
CISC VS.RISC
The CISC approach attempts to minimize the number of instructions per program, sacrificing the number of cycles per instruction.
RISC does the opposite, reducing the cycles per instruction at the cost of the number of instructions per program.
INSTRUCTION
CISC
RISC
STORE address1, R1
CODE SIZE
CISC
RISC
Code size is smaller but complicated.
Code size is larger but simpler.
REGISTERS AND ADDRESSING MODE
CISC RISC
CISC
RISC
RISC microprocessors are Alpha, ARC, ARM, AVR, MIPS, PA-RISC, PICPower Architecture, and SPARC.
CISC processors are the System/360, VAX, PDP-11, Motorola 68000 family, AMD, and Intel x86 CPUs
Characteristics of RISC
Characteristics of CISC
RISC APPLICATIONS
RISC APPLICATIONS
LOW END &
MOBILE SYSTEM
o Android based systems/ Apple iPhone/
Nintendo GBA etc.
o in PlayStations, Nintendo 64 etc.
o Xbox handheld controllers to BMW cars
HIGH END RISC & SUPERCOMPUTING
o used in embedded system in routers, used
by Digital Equipment Corporation etc.
o In many IBM’s supercomputers, workstations
etc.
o In Single-board computers, Servers & Supercomputers from Digital Equivalent Cooperation etc.
ARM Architecture
ARM BASED PRODUCTS.
multi-core processors.
Sources : http://embeddedcraft.org/ http://whatis.techtarget.com/definition/ARM-processor