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ISA�Instructure Set Archiceture

Presented By

Dr. Abhaya Kumar Sahoo

Computer Science &Engineering

KIIT University

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OUTLINE

  • What is RISC?
  • CISC
  • Background and History
  • Characteristics

Pipelining Hardware

  • RISC v/s CISC
  • Performance Equation
  • Applications of RISC
  • RISC & CISC Convergence

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INTRODUCTION

  • RISC – Reduced Instruction Set Computer
  • RISC is a type of microprocessor architecture that utilizes
  • a small, highly-optimized set of instructions
  • rather than a more specialized set of instructions.
  • The main alternative for RISC is CISC ,which stands for complex instruction set computer.
  • CISC is the older approach, that came about to maximize performance of earlier computer’s. Where instructions were executed sequentially.

The instruction set is the hardware language that tells the processor what to do.

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BACKGROUND AND HISTORY

  • RISC approach developed as a result of development in 1970’s
    • increase in memory size
    • decrease in cost
    • advanced compilers
  • In late 1970’s IBM was the first to start.
  • In 1980 , David Patterson ,began the project that gives this approach RISC.
  • After some years ,Stanford MIPS was developed.

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CHARACTERSTICS OF RISC

  • Simplified instructions , taking 1 clock cycle.
  • Large no. of general purpose registers.
  • Circuit is much simpler.
  • Fast to decode.
  • Fast to execute.
  • Pipelining- fetching of next instruction while previous instruction executes.

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CISC vs. RISC

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CISC VS.RISC

The CISC approach attempts to minimize the number of instructions per program, sacrificing the number of cycles per instruction.

RISC does the opposite, reducing the cycles per instruction at the cost of the number of instructions per program.

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INSTRUCTION

CISC

  • Complex Instructions.

  • ADD AX,[BX + SI + 600H]
  • Many operations in single instruction.

RISC

  • Simpler or reduced instructions.

  • LOAD R1, addresss1
  • LOAD R2, address2
  • ADD R1, R2

STORE address1, R1

  • One instruction one operation.

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CODE SIZE

CISC

RISC

Code size is smaller but complicated.

Code size is larger but simpler.

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REGISTERS AND ADDRESSING MODE

  • Fewer register.
  • These registers are designed for special purposes.
  • CISC designs provide a large number of addressing modes.

CISC RISC

  • Large number of registers.
  • Here registers are identical so any register can be used for any purpose.
  • RISC designs have single addressing modes.

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CISC

  • Slower to execute.

  • Difficult to decode.

  • Instruction size varies in different instructions.

  • Complex circuit design.

RISC

  • Faster execution.

  • Easy to decode.

  • Same instruction size in every instructions.

  • Circuit design is simpler.

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RISC microprocessors are Alpha, ARC, ARM, AVR, MIPS, PA-RISC, PICPower Architecture, and SPARC.

CISC processors are the System/360, VAX, PDP-11, Motorola 68000 family, AMD, and Intel x86 CPUs

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Characteristics of RISC

  • Relatively few instructions.
  • Relatively few addressing modes.
  • Memory access limited to load and store instructions.
  • All operations are done within the registers of the CPU.
  • Fixed-length, easily decoded instruction format.
  • Single-cycle instruction execution.
  • Hardwired rather than microprogrammed control.
  • A relatively large number of registers in the processor unit.
  • Use of overlapped register windows to speed-up procedure call and return.
  • Efficient instruction pipeline.
  • Compiler support for efficient translation of high-level language programs into machine language programs.

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Characteristics of CISC

  • A larger number of instructions – typically from 100 to 250 instructions
  • Some instructions that perform specialized tasks and are used infrequently
  • A large variety of addressing modes – typically from 5 to 20 different modes
  • Variable-length instruction formats
  • Instructions that manipulate operands in memory

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RISC APPLICATIONS

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RISC APPLICATIONS

LOW END &

MOBILE SYSTEM

  • ARM ARCHITECTURE

o Android based systems/ Apple iPhone/

Nintendo GBA etc.

  • MIPS line

o in PlayStations, Nintendo 64 etc.

  • Atmel AVR

o Xbox handheld controllers to BMW cars

HIGH END RISC & SUPERCOMPUTING

  • MIPS

o used in embedded system in routers, used

by Digital Equipment Corporation etc.

  • IBM’S Power Architecture

o In many IBM’s supercomputers, workstations

etc.

  • Alpha

o In Single-board computers, Servers & Supercomputers from Digital Equivalent Cooperation etc.

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ARM Architecture

ARM BASED PRODUCTS.

  • Developed by Advanced RISC Machines (ARM).
  • ARM makes 32-bit & 64-bit RISC

multi-core processors.

  • Features of ARM architecture:
    • A load/store architecture
    • An orthogonal instruction set.
    • Fixed instruction width
    • Mostly single clock-cycle execution.
    • Enhanced power-saving design.
    • Hardware virtualization supports.

Sources : http://embeddedcraft.org/ http://whatis.techtarget.com/definition/ARM-processor