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Chapter 4�DC Biasing–BJTs

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Biasing

Biasing: The DC voltages applied to a transistor in order to turn it on so that it can amplify the AC signal.

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Operating Point

The DC input establishes an operating or quiescent point

called the Q-point.

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The Three States of Operation

Active or Linear Region Operation

Base–Emitter junction is forward biased

Base–Collector junction is reverse biased

Cutoff Region Operation

Base–Emitter junction is reverse biased

Base–Collector junction is reverse biased

Saturation Region Operation

Base–Emitter junction is forward biased

Base–Collector junction is forward biased

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Fixed-bias circuit
Emitter-stabilized bias circuit
Collector-emitter loop
Voltage divider bias circuit
DC bias with voltage feedback

DC Biasing Circuits

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Fixed Bias

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The Base-Emitter Loop

From Kirchhoff’s voltage law:

Solving for base current:

+V_CC – I_BR_B – V_BE = 0

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Collector-Emitter Loop

Collector current:

From Kirchhoff’s voltage law:

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Saturation

When the transistor is operating in saturation, current through the transistor is at its maximum possible value.

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I_Csat

I_C = V_CC / R_C

V_CE = 0 V

V_CEcutoff

V_CE = V_CC

I_C = 0 mA

where the value of R_B sets the value of I_B
that sets the values of V_CE and I_C

Load Line Analysis

The Q-point is the operating point:

The end points of the load line are:

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Circuit Values Affect the Q-Point

more …

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Circuit Values Affect the Q-Point

more …

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Circuit Values Affect the Q-Point

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Emitter-Stabilized Bias Circuit

Adding a resistor (R_E) to the emitter circuit stabilizes the bias circuit.

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Base-Emitter Loop

From Kirchhoff’s voltage law:

Since I_E = (b + 1)I_B:

Solving for I_B:

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Collector-Emitter Loop

From Kirchhoff’s voltage law:

Since I_E  I_C:

Also:

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Improved Biased Stability

Stability refers to a circuit condition in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor Beta () values.

Adding RE to the emitter improves the stability of a transistor.

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Saturation Level

V_CEcutoff:

I_Csat:

The endpoints can be determined from the load line.

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Voltage Divider Bias

This is a very stable bias circuit.

The currents and voltages are nearly independent of any variations in .

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Approximate Analysis

Where I_B << I₁ and I₁  I₂:

Where bR_E > 10R₂:

From Kirchhoff’s voltage law:

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Voltage Divider Bias Analysis

Transistor Saturation Level

Load Line Analysis

Cutoff: Saturation:

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DC Bias with Voltage Feedback

Another way to improve the stability of a bias circuit is to add a feedback path from collector to base.

In this bias circuit the Q-point is only slightly dependent on the transistor beta, .

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Base-Emitter Loop

From Kirchhoff’s voltage law:

Where I_B << I_C:

Knowing I_C = I_B and I_E  I_C, the loop equation becomes:

Solving for I_B:

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Collector-Emitter Loop

Applying Kirchoff’s voltage law:

I_E + V_CE + I’_CR_C – V_CC = 0

Since I_C  I_C and I_C = I_B:

I_C(R_C + _RE) + V_CE – V_CC =0

Solving for V_CE:

V_CE = V_CC – I_C(R_C + R_E)

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Base-Emitter Bias Analysis

Transistor Saturation Level

Load Line Analysis

Cutoff: Saturation:

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Transistor Switching Networks

Transistors with only the DC source applied can be used as electronic switches.

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Switching Circuit Calculations

Saturation current:

To ensure saturation:

Emitter-collector resistance at saturation and cutoff:

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Switching Time

Transistor switching times:

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Approximate voltages

V_BE  .7 V for silicon transistors
V_CE  25% to 75% of V_CC

Test for opens and shorts with an ohmmeter.
Test the solder joints.
Test the transistor with a transistor tester or a curve tracer.
Note that the load or the next stage affects the transistor operation.

Troubleshooting Hints

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PNP Transistors

The analysis for pnp transistor biasing circuits is the same as that for npn transistor circuits. The only difference is that the currents are flowing in the opposite direction.

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