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Instruction Set

The repertoire of instructions of a computer
Different computers have different instruction sets

But with many aspects in common

Early computers had very simple instruction sets

Simplified implementation

Many modern computers also have simple instruction sets

Chapter 2 — Instructions: Language of the Computer — 3

§2.1 Introduction

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The MIPS Instruction Set

Used as the example throughout the book
Stanford MIPS commercialized by MIPS Technologies (www.mips.com)
Typical of many modern ISAs

See MIPS Reference Data tear-out card, and Appendixes B and E

Similar ISAs have a large share of embedded core market

Applications in consumer electronics, network/storage equipment, cameras, printers, …

Chapter 2 — Instructions: Language of the Computer — 4

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Levels of Program Code

High-level language

Level of abstraction closer to problem domain
Provides for productivity and portability

Assembly language

Textual representation of instructions

Hardware representation

Binary digits (bits)
Encoded instructions and data

Chapter 1 — Computer Abstractions and Technology — 15

Mandatory assignment 1

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Arithmetic Operations

Add and subtract, three operands

Two sources and one destination

add a, b, c # a gets b + c

All arithmetic operations have this form
Design Principle 1: Simplicity favors regularity

Regularity makes implementation simpler
Simplicity enables higher performance at lower cost

Chapter 2 — Instructions: Language of the Computer — 16

§2.2 Operations of the Computer Hardware

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Arithmetic Example

C code:

f = (g + h) - (i + j);

Compiled MIPS code:

add t0, g, h # temp t0 = g + h�add t1, i, j # temp t1 = i + j�sub f, t0, t1 # f = t0 - t1

Chapter 2 — Instructions: Language of the Computer — 17

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Arithmetic instructions use register�operands
MIPS has a 32 × 32-bit register file

Use for frequently accessed data
Numbered 0 to 31
32-bit data called a “word”

Assembler names

$t0, $t1, …, $t9 for temporary values
$s0, $s1, …, $s7 for saved variables

Design Principle 2: Smaller is faster

c.f. main memory: millions of locations

Chapter 2 — Instructions: Language of the Computer — 18

§2.3 Operands of the Computer Hardware

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C code:

f = (g + h) - (i + j);

f, …, j in $s0, …, $s4

Compiled MIPS code:

add $t0, $s1, $s2�add $t1, $s3, $s4�sub $s0, $t0, $t1

Chapter 2 — Instructions: Language of the Computer — 19

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Memory Operands

Main memory used for composite data

Arrays, structures, dynamic data

To apply arithmetic operations

Load values from memory into registers
Store result from register to memory

Memory is byte addressed

Each address identifies an 8-bit byte

Words are aligned in memory

Address must be a multiple of 4

MIPS is Big Endian

Most-significant byte at least address of a word
c.f. Little Endian: least-significant byte at least address

Chapter 2 — Instructions: Language of the Computer — 20

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Memory Operand Example 1

C code:

g = h + A[8];

g in $s1, h in $s2, base address of A in $s3

Compiled MIPS code:

Index 8 requires offset of 32

4 bytes per word

lw $t0, 32($s3) # load word�add $s1, $s2, $t0

Chapter 2 — Instructions: Language of the Computer — 21

offset

base register

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Memory Operand Example 2

C code:

A[12] = h + A[8];

h in $s2, base address of A in $s3

Compiled MIPS code:

Index 8 requires offset of 32

lw $t0, 32($s3) # load word�add $t0, $s2, $t0�sw $t0, 48($s3) # store word

Chapter 2 — Instructions: Language of the Computer — 22

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Registers vs. Memory

Registers are faster to access than memory
Operating on memory data requires loads and stores

More instructions to be executed

Compiler must use registers for variables as much as possible

Only spill to memory for less frequently used variables
Register optimization is important!

Chapter 2 — Instructions: Language of the Computer — 23

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Immediate Operands

Constant data specified in an instruction

addi $s3, $s3, 4

No subtract immediate instruction

Just use a negative constant

addi $s2, $s1, -1

Design Principle 3: Make the common case fast

Small constants are common
Immediate operand avoids a load instruction

Chapter 2 — Instructions: Language of the Computer — 25

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The Constant Zero

MIPS register 0 ($zero) is the constant 0

Cannot be overwritten

Useful for common operations

E.g., move between registers

add $t2, $s1, $zero

Chapter 2 — Instructions: Language of the Computer — 26

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Unsigned Binary Integers

Given an n-bit number

Chapter 2 — Instructions: Language of the Computer — 27

Range: 0 to +2ⁿ – 1
Example

0000 0000 0000 0000 0000 0000 0000 1011₂�= 0 + … + 1×2³ + 0×2² +1×2¹ +1×2⁰�= 0 + … + 8 + 0 + 2 + 1 = 11₁₀

Using 32 bits

0 to +4,294,967,295

§2.4 Signed and Unsigned Numbers

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2s-Complement Signed Integers

Given an n-bit number

Chapter 2 — Instructions: Language of the Computer — 28

Range: –2^{n – 1} to +2^{n – 1} – 1
Example

1111 1111 1111 1111 1111 1111 1111 1100₂�= –1×2³¹ + 1×2³⁰ + … + 1×2² +0×2¹ +0×2⁰�= –2,147,483,648 + 2,147,483,644 = –4₁₀

Using 32 bits

–2,147,483,648 to +2,147,483,647

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2s-Complement Signed Integers

Bit 31 is sign bit

1 for negative numbers
0 for non-negative numbers

–(–2^{n – 1}) can’t be represented
Non-negative numbers have the same unsigned and 2s-complement representation
Some specific numbers

0: 0000 0000 … 0000
–1: 1111 1111 … 1111
Most-negative: 1000 0000 … 0000
Most-positive: 0111 1111 … 1111

Chapter 2 — Instructions: Language of the Computer — 29

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Signed Negation

Complement and add 1

Complement means 1 → 0, 0 → 1

Chapter 2 — Instructions: Language of the Computer — 30

Example: negate +2

+2 = 0000 0000 … 0010₂
–2 = 1111 1111 … 1101₂ + 1� = 1111 1111 … 1110₂

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Sign Extension

Representing a number using more bits

Preserve the numeric value

In MIPS instruction set

addi: extend immediate value
lb, lh: extend loaded byte/halfword
beq, bne: extend the displacement

Replicate the sign bit to the left

c.f. unsigned values: extend with 0s

Examples: 8-bit to 16-bit

+2: 0000 0010 => 0000 0000 0000 0010
–2: 1111 1110 => 1111 1111 1111 1110

Chapter 2 — Instructions: Language of the Computer — 31

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Representing Instructions

Instructions are encoded in binary

Called machine code

MIPS instructions

Encoded as 32-bit instruction words
Small number of formats encoding operation code (opcode), register numbers, …
Regularity!

$t0 – $t7 are reg’s 8 – 15
$t8 – $t9 are reg’s 24 – 25
$s0 – $s7 are reg’s 16 – 23

Chapter 2 — Instructions: Language of the Computer — 32

§2.5 Representing Instructions in the Computer

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Hexadecimal

Base 16

Compact representation of bit strings
4 bits per hex digit

Chapter 2 — Instructions: Language of the Computer — 33

0	0000	4	0100	8	1000	c	1100
1	0001	5	0101	9	1001	d	1101
2	0010	6	0110	a	1010	e	1110
3	0011	7	0111	b	1011	f	1111

Example: eca8 6420

1110 1100 1010 1000 0110 0100 0010 0000

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MIPS R-format Instructions

Instruction fields

op: operation code (opcode)
rs: first source register number
rt: second source register number
rd: destination register number
shamt: shift amount (00000 for now)
funct: function code (extends opcode)

Chapter 2 — Instructions: Language of the Computer — 34

shamt

funct

6 bits

5 bits

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R-format Example

add $t0, $s1, $s2

Chapter 2 — Instructions: Language of the Computer — 35

special

$s1

$s2

$t0

add

000000

10001

10010

01000

00000

100000

00000010001100100100000000100000₂ = 02324020₁₆

shamt

funct

6 bits

5 bits

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MIPS I-format Instructions

Immediate arithmetic and load/store instructions

rt: destination or source register number
Constant: –2¹⁵ to +2¹⁵ – 1
Address: offset added to base address in rs

Design Principle 4: Good design demands good compromises

Different formats complicate decoding, but allow 32-bit instructions uniformly
Keep formats as similar as possible

Chapter 2 — Instructions: Language of the Computer — 36

constant or address

6 bits

5 bits

16 bits

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Stored Program Computers

Instructions represented in binary, just like data
Instructions and data stored in memory
Programs can operate on programs

e.g., compilers, linkers, …

Binary compatibility allows compiled programs to work on different computers

Standardized ISAs

Chapter 2 — Instructions: Language of the Computer — 37

The BIG Picture

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Logical Operations

Instructions for bitwise manipulation

Chapter 2 — Instructions: Language of the Computer — 38

Operation	C	Java	MIPS
Shift left	<<	<<	sll
Shift right	>>	>>>	srl
Bitwise AND	&	&	and, andi
Bitwise OR	\|	\|	or, ori
Bitwise NOT	~	~	nor

Useful for extracting and inserting groups of bits in a word

§2.6 Logical Operations

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Shift Operations

shamt: how many positions to shift
Shift left logical

Shift left and fill with 0 bits
sll by i bits multiplies by 2ⁱ

Shift right logical

Shift right and fill with 0 bits
srl by i bits divides by 2ⁱ (unsigned only)

Chapter 2 — Instructions: Language of the Computer — 39

shamt

funct

6 bits

5 bits

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AND Operations

Useful to mask bits in a word

Select some bits, clear others to 0

and $t0, $t1, $t2

Chapter 2 — Instructions: Language of the Computer — 40

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OR Operations

Useful to include bits in a word

Set some bits to 1, leave others unchanged

or $t0, $t1, $t2

Chapter 2 — Instructions: Language of the Computer — 41

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NOT Operations

Useful to invert bits in a word

Change 0 to 1, and 1 to 0

MIPS has NOR 3-operand instruction

a NOR b == NOT ( a OR b )

nor $t0, $t1, $zero

Chapter 2 — Instructions: Language of the Computer — 42

0000 0000 0000 0000 0011 1100 0000 0000

$t1

1111 1111 1111 1111 1100 0011 1111 1111

$t0

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Conditional Operations

Branch to a labeled instruction if a condition is true

Otherwise, continue sequentially

beq rs, rt, L1

if (rs == rt) branch to instruction labeled L1;

bne rs, rt, L1

if (rs != rt) branch to instruction labeled L1;

j L1

unconditional jump to instruction labeled L1

Chapter 2 — Instructions: Language of the Computer — 43

§2.7 Instructions for Making Decisions

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Compiling If Statements

C code:

if (i==j) f = g+h;�else f = g-h;

f, g, … in $s0, $s1, …

Compiled MIPS code:

bne $s3, $s4, Else� add $s0, $s1, $s2� j Exit�Else: sub $s0, $s1, $s2�Exit: …

Chapter 2 — Instructions: Language of the Computer — 44

Assembler calculates addresses

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Compiling Loop Statements

C code:

while (save[i] == k) i += 1;

i in $s3, k in $s5, address of save in $s6

Compiled MIPS code:

Loop: sll $t1, $s3, 2� add $t1, $t1, $s6� lw $t0, 0($t1)� bne $t0, $s5, Exit� addi $s3, $s3, 1� j Loop�Exit: …

Chapter 2 — Instructions: Language of the Computer — 45

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Basic Blocks

A basic block is a sequence of instructions with

No embedded branches (except at end)
No branch targets (except at beginning)

Chapter 2 — Instructions: Language of the Computer — 46

A compiler identifies basic blocks for optimization
An advanced processor can accelerate execution of basic blocks

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More Conditional Operations

Set result to 1 if a condition is true

Otherwise, set to 0

slt rd, rs, rt

if (rs < rt) rd = 1; else rd = 0;

slti rt, rs, constant

if (rs < constant) rt = 1; else rt = 0;

Use in combination with beq, bne

slt $t0, $s1, $s2 # if ($s1 < $s2)�bne $t0, $zero, L # branch to L

Chapter 2 — Instructions: Language of the Computer — 47

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Branch Instruction Design

Why not blt, bge, etc?
Hardware for <, ≥, … slower than =, ≠

Combining with branch involves more work per instruction, requiring a slower clock
All instructions penalized!

beq and bne are the common case
This is a good design compromise

Chapter 2 — Instructions: Language of the Computer — 48

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Signed vs. Unsigned

Signed comparison: slt, slti
Unsigned comparison: sltu, sltui
Example

$s0 = 1111 1111 1111 1111 1111 1111 1111 1111
$s1 = 0000 0000 0000 0000 0000 0000 0000 0001
slt $t0, $s0, $s1 # signed

–1 < +1 ⇒ $t0 = 1

sltu $t0, $s0, $s1 # unsigned

+4,294,967,295 > +1 ⇒ $t0 = 0

Chapter 2 — Instructions: Language of the Computer — 49

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Procedure Calling

Steps required

Place parameters in registers
Transfer control to procedure
Acquire storage for procedure
Perform procedure’s operations
Place result in register for caller
Return to place of call

Chapter 2 — Instructions: Language of the Computer — 50

x = lead_example(1, 2, 3, 4);

…

int leaf_example (int g, h, i, j)�{ int f;� f = (g + h) - (i + j);� return f;�}

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$a0 – $a3: arguments (reg’s 4 – 7)
$v0, $v1: result values (reg’s 2 and 3)
$t0 – $t9: temporaries

Can be overwritten by callee

$s0 – $s7: saved

Must be saved/restored by callee

$gp: global pointer for static data (reg 28)
$sp: stack pointer (reg 29)
$fp: frame pointer (reg 30)
$ra: return address (reg 31)

Chapter 2 — Instructions: Language of the Computer — 51

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Procedure Call Instructions

Procedure call: jump and link

jal ProcedureLabel

Address of following instruction put in $ra
Jumps to target address

Procedure return: jump register

jr $ra

Copies $ra to program counter
Can also be used for computed jumps

e.g., for case/switch statements

Chapter 2 — Instructions: Language of the Computer — 52

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Leaf Procedure Example

C code:

int leaf_example (int g, h, i, j)�{ int f;� f = (g + h) - (i + j);� return f;�}

Arguments g, …, j in $a0, …, $a3
f in $s0 (hence, need to save $s0 on stack)
Result in $v0

Chapter 2 — Instructions: Language of the Computer — 53

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Leaf Procedure Example

Chapter 2 — Instructions: Language of the Computer — 54

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Non-Leaf Procedures

Procedures that call other procedures
For nested call, caller needs to save on the stack:

Its return address
Any arguments and temporaries needed after the call

Restore from the stack after the call

Chapter 2 — Instructions: Language of the Computer — 55

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Non-Leaf Procedure Example

C code:

int fact (int n)�{ � if (n < 1) return f;� else return n * fact(n - 1);�}

Argument n in $a0
Result in $v0

Chapter 2 — Instructions: Language of the Computer — 56

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Non-Leaf Procedure Example

Chapter 2 — Instructions: Language of the Computer — 57

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Local Data on the Stack

Local data allocated by callee

e.g., C automatic variables

Procedure frame (activation record)

Used by some compilers to manage stack storage

Chapter 2 — Instructions: Language of the Computer — 58

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Memory Layout

Text: program code
Static data: global variables

e.g., static variables in C, constant arrays and strings
$gp initialized to address allowing ±offsets into this segment

Dynamic data: heap

E.g., malloc in C, new in Java

Stack: automatic storage

Chapter 2 — Instructions: Language of the Computer — 59

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Character Data

Byte-encoded character sets

ASCII: 128 characters

95 graphic, 33 control

Latin-1: 256 characters

ASCII, +96 more graphic characters

Unicode: 32-bit character set

Used in Java, C++ wide characters, …
Most of the world’s alphabets, plus symbols
UTF-8, UTF-16: variable-length encodings

Chapter 2 — Instructions: Language of the Computer — 60

§2.9 Communicating with People

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Byte/Halfword Operations

Could use bitwise operations
MIPS byte/halfword load/store

String processing is a common case

lb rt, offset(rs) lh rt, offset(rs)

Sign extend to 32 bits in rt

lbu rt, offset(rs) lhu rt, offset(rs)

Zero extend to 32 bits in rt

sb rt, offset(rs) sh rt, offset(rs)

Store just rightmost byte/halfword

Chapter 2 — Instructions: Language of the Computer — 61

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String Copy Example

C code (naïve):

Null-terminated string

void strcpy (char x[], char y[])�{ int i;� i = 0;� while ((x[i]=y[i])!='\0')� i += 1;�}

Addresses of x, y in $a0, $a1
i in $s0

Chapter 2 — Instructions: Language of the Computer — 62

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String Copy Example

Chapter 2 — Instructions: Language of the Computer — 63

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32-bit Constants

Most constants are small

16-bit immediate is sufficient

For the occasional 32-bit constant

lui rt, constant

Copies 16-bit constant to left 16 bits of rt
Clears right 16 bits of rt to 0

Chapter 2 — Instructions: Language of the Computer — 64

§2.10 MIPS Addressing for 32-Bit Immediates and Addresses

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Branch Addressing

Branch instructions specify

Opcode, two registers, target address

Most branch targets are near branch

Forward or backward

Chapter 2 — Instructions: Language of the Computer — 65

constant or address

6 bits

5 bits

16 bits

PC-relative addressing

Target address = PC + offset × 4
PC already incremented by 4 by this time

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Jump Addressing

Jump (j and jal) targets could be anywhere in text segment

Encode full address in instruction

Chapter 2 — Instructions: Language of the Computer — 66

address

6 bits

26 bits

(Pseudo)Direct jump addressing

Target address = PC_31…28 : (address × 4)

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Target Addressing Example

Loop code from earlier example

Assume Loop at location 80000

Chapter 2 — Instructions: Language of the Computer — 67

Loop: sll $t1, $s3, 2	80000	0	0	19	9	4	0
add $t1, $t1, $s6	80004	0	9	22	9	0	32
lw $t0, 0($t1)	80008	35	9	8	0
bne $t0, $s5, Exit	80012	5	8	21	2
addi $s3, $s3, 1	80016	8	19	19	1
j Loop	80020	2	20000
Exit: …	80024

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Branching Far Away

If branch target is too far to encode with 16-bit offset, assembler rewrites the code
Example

beq $s0,$s1, L1

↓

bne $s0,$s1, L2� j L1�L2: …

Chapter 2 — Instructions: Language of the Computer — 68

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Addressing Mode Summary

Chapter 2 — Instructions: Language of the Computer — 69

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Concluding Remarks

Design principles

1. Simplicity favors regularity

2. Smaller is faster

3. Make the common case fast

4. Good design demands good compromises

MIPS: typical of RISC ISAs

c.f. x86

Chapter 2 — Instructions: Language of the Computer — 70

§2.22 Concluding Remarks

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Digital Technology Innovation Lab

Concept

Team

Validation

Prototype

Finance

Tech Startup

Sep

Jun

Mar

Dec

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