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��DATA PROCESSING CIRCUITS

S. Rohini

Assistant professor

Department of CS & IT

CPA College

Bodinayakanur

Cardamom Planters’ Association College

(Re-accredited with ‘B’ Grade by NAAC)

Pankajam Nagar, Bodinayakanur – 625513

Department of CS & IT

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Content

Multiplexer
2:1 Multiplexer
4:1 Multiplexer
Demultiplexer
1 of 16 Demultiplexer
Decoder
BCD to Decimal Decoders
Seven segment decoders
Encoders
Parity generator & Checkers

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MULTIPLEXER-DEMULTIPLEXER

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TYPES OF MULTILEXR

2:1 Multiplexer (1 selector line)
4:1 Multiplexer (2 selector lines)
8:1 Multiplexer (3 selector lines)
16:1 Multiplexer (4 selector lines)

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2:1 MULTIPLEXER

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4:1 MULTIPLEXER�

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DEMULTIPLEXER

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A Demultiplexer (or DEMUX) is a device that takes a single input line and routes it to one of several digital output lines.
A Demultiplexer of 2ⁿ outputs has n select lines, which are used to select which output line to send the input.
A Demultiplexer is also called a data distributor.
Operation - exact opposite of the Multiplexer

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TYPES OF DEMULTIPLEXR

1:2 Demultiplexer ( 1 selector line)
1:4 Demultiplexer ( 2 selector lines)
1:8 Demultiplexer ( 3 selector lines)
1:16 Demultiplexer ( 4 selector lines)

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1:2 DEMULTIPLEXER

Selector line	OUTPUT
Selector line
0	D	0
1	0	D

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1:16 DEMULTIPLEXER

It has one input data, four select lines X0, X1, X2 and X3 and 16 output lines Y0 to Y15.

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ENCODERS - DECODERS

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DECODERS

It means to translate or decode coded information from one format into another, so a digital decoder transforms a set of digital input signals into an equivalent decimal code at its output.
A decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2^n unique output lines.
Types of decoders

2:4 decoder
3:8 decoder
BCD to Decimal decoder
Seven segment decoder

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2:4 DECODER

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BCD TO DECIMAL DECODER

It is called a l-of-10 decoder because only 1 of the 10 output lines is high.
For instance, when ABCD is 0011, only the Y3 AND gate has all high inputs; therefore, only the Y3 output is high.
If ABCD changes to 1000, only the Y8 AND gate has all high inputs; as a result, only the Y8 output goes high
If you check the other ABCD possibilities (0000 to 1001 ), you will find that the subscript of the high output always equals the decimal equivalent of the input BCD digit.
For this reason, the circuit is also called a BCD-to-decimal converter.

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SEVEN SEGMENT DECODER

Seven segment display is an electronic device which consists of seven Light Emitting Diodes (LEDs) arranged in a some definite pattern (common cathode or common anode type), which is used to display Hexadecimal numerals (in this case decimal numbers, as input is BCD i.e., 0-9).
Two types of seven segment LED display:

Common Cathode Type: In this type of display all cathodes of the seven LEDs are connected together to the ground or -Vcc(hence, common cathode) and LED displays digits when some ‘HIGH’ signal is supplied to the individual anodes.

Common Anode Type: In this type of display all the anodes of the seven LEDs are connected to battery or +Vcc and LED displays digits when some ‘LOW’ signal is supplied to the individual cathodes.

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But, seven segment display does not work by directly supplying voltage to different segments of LEDs.
First, our decimal number is changed to its BCD equivalent signal then BCD to seven segment decoder converts that signals to the form which is fed to seven segment display.
This BCD to seven segment decoder has four input lines (A, B, C and D) and 7 output lines (a, b, c, d, e, f and g), this output is given to seven segment LED display which displays the decimal number depending upon inputs.

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APPLICATION

Seven-segment displays are used to display the digits in calculators, clocks, various measuring instruments, digital watches and digital counters.

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ENCODERS

An encoder is a combinational circuit that converts binary information in the form of a 2N input lines into N output lines, which represent N bit code for the input.
For simple encoders, it is assumed that only one input line is active at a time.
Types of Encoders

4:2 Encoder
8:3 Encoder
Priority Encoder
Decimal to BCD Encoder

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4:2 ENCODER

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DECIMAL TO BCD ENCODER

The decimal to binary encoder usually consists of 10 input lines and 4 output lines.
Each input line corresponds to the each decimal digit and 4 outputs correspond to the BCD code.
This encoder accepts the decoded decimal data as an input and encodes it to the BCD output which is available on the output lines.

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PARITY GENERATOR & CHECKER

What is Parity Bit?

The parity generating technique is one of the most widely used error detection techniques for the data transmission.
In digital systems, when binary data is transmitted and processed , data may be subjected to noise so that such noise can alter 0s (of data bits) to 1s and 1s to 0s.
Hence, parity bit is added to the word containing data in order to make number of 1s either even or odd. Thus it is used to detect errors , during the transmission of binary data
The message containing the data bits along with parity bit is transmitted from transmitter node to receiver node.
At the receiving end, the number of 1s in the message is counted and if it doesn’t match with the transmitted one, then it means there is an error in the data.

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PARITY GENERATOR & CHECKER

A parity generator is a combinational logic circuit that generates the parity bit in the transmitter.
On the other hand, a circuit that checks the parity in the receiver is called parity checker.
A combined circuit or devices of parity generators and parity checkers are commonly used in digital systems to detect the single bit errors in the transmitted data word.
The sum of the data bits and parity bits can be even or odd .
In even parity, the added parity bit will make the total number of 1s an even amount whereas in odd parity the added parity bit will make the total number of 1s odd amount.
The basic principle involved in the implementation of parity circuits is that sum of odd number of 1s is always 1 and sum of even number of 1s is always zero.
Such error detecting and correction can be implemented by using Ex-OR gates (since Ex-OR gate produce zero output when there are even number of inputs).

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PARITY GENERATOR

It is combinational circuit that accepts an n-1 bit stream data and generates the additional bit that is to be transmitted with the bit stream. This additional or extra bit is termed as a parity bit.

In even parity bit scheme, the parity bit is ‘0’ if there are even number of 1s in the data stream and the parity bit is ‘1’ if there are odd number of 1s in the data stream.

In odd parity bit scheme, the parity bit is ‘1’ if there are even number of 1s in the data stream and the parity bit is ‘0’ if there are odd number of 1s in the data stream.

Even parity generator

Odd parity generator

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PARITY CHECKER

It is a logic circuit that checks for possible errors in the transmission.
This circuit can be an even parity checker or odd parity checker depending on the type of parity generated at the transmission end.
When this circuit is used as even parity checker, the number of input bits must always be even. When a parity error occurs, the ‘sum even’ output goes low and ‘sum odd’ output goes high.
If this logic circuit is used as an odd parity checker, the number of input bits should be odd, but if an error occurs the ‘sum odd’ output goes low and ‘sum even’ output goes high.

Even parity checker

odd parity checker