AAAI’25 TUTORIAL ML FOR SOLVERS, PART II�MACHINE-LEARNING-BASED ALGORITHM SELECTION AND CONFIGURATION
Presenter: John Lu, Piyush Jha
Agenda
Introduction
Algorithm Selection
Algorithm Configuration
Active & Trending Areas
Motivation: Solvers show Complementary Strengths and Weaknesses
Different solver algorithms/parameters may favor different problem classes:
Motivation: Solvers show Complementary Strengths and Weaknesses
results of SAT Competition 2024
Motivation: Leverage Complementary Strengths
Construct a near-VBS is hard:
Motivation: Leverage Complementary Strengths
To systematically find the optimal solver for a specific problem class/instance:
Data-Driven, Machine-Learning-Based
Algorithm Selection and Algorithm Configuration
Machine-Learning-Based Algorithm Selection
Algorithm
Selector
Machine-Learning-Based Algorithm Selection
Algorithm
Selector
Feature Representation
ML Models
ML training
Training
SATzilla (Xu et al., 2008): Pioneering Algorithm Selector for SAT
runtime prediction
SATzilla: Pioneering Algorithm Selector for SAT
EHM-based Algorithm Selection
……
SATzilla: Pioneering Algorithm Selector for SAT
Feature Representations for SAT instances (In total 48 features)
Criteria: Correlate Well with Hardness, Cheap to Compute
SATzilla: Pioneering Algorithm Selector for SAT
SATzilla07 and SATzilla2009 won 5 medals in SAT comp 2007 and 2009, respectively.
Results from a recent work refactoring SATzilla (Shavit & Hoos, 2024):
Time
SATzilla2024 (refactored)
SATzilla2012 (Xu et al., 2012)
VBS
SBS (SBVA Cadical)
On 2023 SAT comp benchmarks
SATzilla2024 closed 66% of the VBS-SBS gap
SATzilla2012 closed 53% of the gap
Btor2-Select (Lu et al., 2025): Algorithm Selection for Hardware Verification
A Hardware Model Checking Instance
(a) described in Btor2
(Niemetz et al., 2018)
(b) graph representation
Solvers
(tool.algorithm)
ABC.BMC
ABC.IMC
ABC.PDR
…
Pono.BMC
Pono.IMC
Pono.IC3
23
Btor2-Select: Algorithm Selection for Hardware Verification
Btor2 Verification Instance
A Simple Embedding
Bag of Keywords
(2, 1, …, 0, 1)
sort
state
zero
69 keywords
xor
Btor2-Select: Algorithm Selection for Hardware Verification
Relabel
sort → A
state → B
zero → C
……
Is there a computationally cheap representation can distinguish such two graphs?
A
A
B
C
A
A
B
C
A B C
A B C
Btor2-Select: Algorithm Selection for Hardware Verification
Weisfeiler-Lehman Graph Kernels (Shervashidze et al., 2011)
A
A
B
C
A
A
B
C
Iteration 0 (original)
A,B
A,B
B,AAC
C,B
A,B
A,C
B,AC
C,AB
Iteration 1
Multiset-label determination and sorting
Iteration 1
Label compression
A,B → D
A,C → E
B,AAC → F
B,AC → G
C,AB → H
C,B → I
D
D
F
I
D
E
G
H
Iteration 1
Relabeling
Btor2-Select: Algorithm Selection for Hardware Verification
Weisfeiler-Lehman Graph Kernels (Shervashidze et al., 2011)
A
A
B
C
A
A
B
C
Iteration 0
D
D
F
I
D
E
G
H
Iteration 1
WL(1) Feature Representations:
A B C D E F G H I
A B C D E F G H I
Iteratively, WL(2), WL(3), etc., can capture richer topological structural information.
Btor2-Select: Algorithm Selection for Hardware Verification
Evaluation
Btor2-Select outperforms:
Algorithm Configuration
Automated search for the optimal parameter configuration of a parameterized algorithm.
Challenge: A solver may have numerous tunable parameters of different types, including categorical, integer, and continuous variables.
Example: $ Z3 -p
global parameters
[module] sat
……
……
[module] optimization
……
Algorithm Configuration
Algorithm Configuration
Algorithm Configuration
ParamILS: Model-Free Algorithm Configuration (Hutter et al., 2009)
Model-Free Search
Within some budgets, try different configurations and return the best one
Iterated Local Search
Adaptively Adjust #Sample Instances to Evaluate and Runtime Capping
Extended Algorithm Configuration: SMT Strategy Synthesis
Tactic
A well-defined reasoning step, which either preprocesses, transforms, or solves the given formula
Examples: simplify, solve-eqs, smt, sat, etc, in the SMT solver Z3 (De Moura, L., & Bjørner, N., 2008)
Strategy
An algorithmic recipe for selecting, sequencing, and parameterizing tactics.
Examples:
Extended Algorithm Configuration: SMT Strategy Challenge
Z3alpha: MCTS for SMT Strategy Synthesis (Lu et al, 2024)
MDP Modelling of
Strategy Synthesis
A simplified context-free grammar (CFG)
<S> → <T> <S>
<S> → smt
<T> → simplify
<T> → aig
<S>
<T> <S>
simply <S>
simplify smt
R =eval(simplify smt) = 0.6
e.g., 60% of instances in S
are solved by this strategy
Z3alpha: MCTS for SMT Strategy Synthesis
<S>
<T> <S>
simply <S>
simplify smt
Search 1
R = 0.6
<S>
<T> <S>
aig <S>
aig smt
Search 2
R = 0.7✓
<S>
smt
Search 3
R = 0.4
……
Infinite space, we want to search “smartly”
Z3alpha: MCTS for SMT Strategy Synthesis
One MCTS Simulation
tree policy:
exploit & explore
Z3alpha: MCTS for SMT Strategy Synthesis
Division | Z3alpha | Z3 Default |
Bitvec | 800 | 792 |
QF_Bitvec | 9020 | 8919 |
QF_Datatypes | 322 | 316 |
QF_Equality | 3821 | 3820 |
QF_Equality+Bitvec | 289 | 290 |
QF_LinearIntArith | 5216 | 4989 |
QF_LinearRealArith | 757 | 753 |
QF_NonLinearIntArith | 9755 | 9464 |
QF_NonLinearRealArith | 2813 | 2470 |
QF_Strings | 29577 | 29174 |
Results of SMT-COMP’24: Num of Correctly Solved Benchmarks
Won Awards in QF_Datatypes, QF_LinearIntArith, QF_NonLinearIntArith, QF_NonLinearRealArith
SMAC: Model-Based Algorithm Configuration (Hutter et al, 2011, Lindauer et al., 2022)
Active & Trending Areas
Automated Feature Representation
Online and Adaptive Learning
Theoretical Work
Summary
Hope you find this tutorial helpful!
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Appendix: Algorithm Configuration Through a Lens of Learning Theory
Appendix: Algorithm Configuration Through a Lens of Learning Theory
Research Question: Generalization Error Bound and Required Sample Size (Balcan et al., 2017; Balcan et al., 2024)
Research Question: Generalization Error Bound for Per-Instance Algorithm Selection (Balcan et al., 2021)
……