Design an analog front-end for Silicon Photo Multiplier

Supervisor: Prof. Christophe De la taille

PHY581C - Microelectronics Experimental ASIC Design

Yiming Wei

Pic from the cover of Nature Neuroscience, Volume 20, Issue 8, August 2017

Pic from NeuRRAM

Introduction: Particle and nuclear physics

• Cherenkov Telescope Array: greatest ground-based observatory for gamma-ray astronomy (20 GeV up to 300 TeV)
• cosmic particles, black holes and nature of dark matter
• Cherenkov flash ~10 ns
• Large Size Telescopes (LSTs) : lower energy gamma rays (≤ 0.1 TeV)

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Design an analog front-end for Silicon Photo Multiplier

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M. Backes

Cherenkov Telescope Array

C. Delacour

Introduction: Particle and nuclear physics

• Accelerating particles to high energies for collisions, creating new particles
• To capture these events, sophisticated tracking and vertex detectors are needed

Design an analog front-end for Silicon Photo Multiplier

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F. Piro

B. Abelev

Topology of a short-lived particle decay

Accelerator complex at CERN

ALICE ITS layout

Introduction: Medical and biophotonics imaging

• Positron Emission Tomography (PET): utilizes gamma photons emitted from positron decay to produce three-dimensional images depicting the body's functional processes
• Injection of radioactive substances, known as tracers to build Line of Response (LOR) 🡪 Time-of-Flight (TOF)
• Fluorescence Lifetime Imaging Microscopy (FLIM) is a technique that measures the decay time of fluorescence 🡪interactions with other molecules

Design an analog front-end for Silicon Photo Multiplier

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A. Morini

X. Zhu

ToF-PET

M. N. Modi

L. M. Hirvonen

Introduction: LiDAR

• Light Detection and Ranging

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a remote sensing technology that measures distance by illuminating a target with a laser light and analyzing the reflected pulses.

Design an analog front-end for Silicon Photo Multiplier

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G.Adamo

3D ranging techniques

high-resolution environmental data for autonomous vehicles

Photomultiplier Tube and Avalanche Photodiode

• PMT: vacuum tube equipped with a light-sensitive component called a photocathode, secondary electron emissions by dynodes
• To capture these events, sophisticated tracking and vertex detectors are needed
• Avalanche Photodiode: reverse-biasing the diode, high to trigger an avalanche breakdown
• Silicon Photomultiplier (SiPM): a grid of micro-cells in series with a quenching resistor

Design an analog front-end for Silicon Photo Multiplier

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S. R. Cherry

A.Ghassemi

Photon counting with SiPM

Avalanche Photo Diode

Silicon Photomultiplier

• Avalanche Phase: avalanche, modelled by the closure of a switch. The photodiode’s depletion capacitance C_d, charged to the bias voltage V_BIAS > V_BD, discharges through a low resistance R_S.

• Quenching and Reset Phase: The quenching resistor R_q curtails the current, leading to a voltage drop that recharges the depletion capacitance at a slower rate.

Design an analog front-end for Silicon Photo Multiplier

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C. Delacour

Silicon Photomultiplier

• If there is no inductor in the circuit (only resistance R and capacitance C), the rise time of the signal is very fast
• Decay time of the pulse is controlled by the RC time constant
• Rise time of the signal starts to degrade due to the inductive effect
• If the resistance is reduced further, the reset of the SiPM becomes faster, resulting in a shorter pulse
• RLC: start oscillating, cause signal degradation, not desirable for high-frequency

Design an analog front-end for Silicon Photo Multiplier

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C. Delacour

Corsi model

• A total number of microcells N_tot, with only a subset N_f becoming active during an event, while the remainder N_p = N_tot − N_f stay inactive
• C_q representing the parasitic capacitance,
• The grid capacitance, denoted as C_g, arises from the interconnection of all the microcells

Design an analog front-end for Silicon Photo Multiplier

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F. Corsi

Dirac-delta

Comparison and Application

• PMT is their tendency to deteriorate over time: hysteresis and they can incur damage from exposure to regular light
• Switching to SiPM can therefore enhance the longevity of the telescope's camera, enhance the sensitivity, higher photodetection efficiency, compactness, and robustness against magnetic fields.
• OMEGA at IN2P3 developed FLC_SIPM, SPIROC, MAROC

Design an analog front-end for Silicon Photo Multiplier

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C. Delacour

X. Zhu

Front-end readout circuit

• Shaper: Following amplification, the signal is passed through a shaper which optimizes
• Analog Memory: Some systems include an analog memory to temporarily store the shaped analog signal before it is digitized.

Design an analog front-end for Silicon Photo Multiplier

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TREX microélectronique C. de La Taille

T. Klauner

Common source amplifier

• R0 and R3 are bias resistors. They help set the operating point of the transistor and ensure that the transistor operates in the correct amplification region. Vdc is the supply voltage that provides the required DC power to this amplifier.

Design an analog front-end for Silicon Photo Multiplier

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Common source amplifier

• We change the resistor into a current source, and since an ideal current source doesn’t actually exist, we use a current mirror to replicate the current

Design an analog front-end for Silicon Photo Multiplier

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Discriminator

• Differential amplifier with an amplified signal on one end (with DC voltage 447mV) and the other end set to a suitable constant voltage(457mV), so once the signal comes, the voltage rises above the threshold voltage and we get an amplified output

Design an analog front-end for Silicon Photo Multiplier

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Discriminator

• Two sources of timing error for leading edge discrimination: time walk and time jitter.
• Time walk refers to timing variations that occur due to differences in signal amplitudes.
• Time jitter represents the statistical time stamp fluctuations caused by system noise.
• Offset of Discriminator: generates a signal even though the input signal has not reached the specified threshold voltage due to thermal noise, pile-up effect of dark count noise

Design an analog front-end for Silicon Photo Multiplier

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Analog-to-digital converter

• Afterwards, the signal output from the discriminator is set to turn on an NMOS, so that the output signal increases and bottoms out close to 0 mV. This signal is then passed through three inverters, and finally we get a clear digital signal (from 0V to 1.2V).

Design an analog front-end for Silicon Photo Multiplier

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Layout Design and Verification

• Design Rule Checking (DRC) 🡪 Layout Versus Schematic (LVS)

Design an analog front-end for Silicon Photo Multiplier

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Layout Design and Verification

• Parasitic Extraction 🡪 Post layout simulation

Design an analog front-end for Silicon Photo Multiplier

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Layout Design and Verification

• Parasitic Extraction 🡪 Post layout simulation(only Cap)

Design an analog front-end for Silicon Photo Multiplier

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Layout Design and Verification

• Parasitic Extraction 🡪 Post layout simulation

Design an analog front-end for Silicon Photo Multiplier

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Layout Design and Verification

• Parasitic Extraction 🡪 Post layout simulation

Design an analog front-end for Silicon Photo Multiplier

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Conclusion

• Centroid to reduce mismatching: in a current mirror, two theoretically identical MOS tubes will have slight differences in their dimensions (width W and length L) due to process errors

Design an analog front-end for Silicon Photo Multiplier

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X. Zhu

Thanks!�

Yiming Wei

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