CS-773 Paper Presentation���DAWG
Dynamically Allocated Way Guard
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Saksham Gupta�Misfits (#2)
180070049@iitb.ac.in
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The Threat
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SHARED LLC
Cache State Based Attacks
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Cache State Based Attacks
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Defense Mechanism
Many fronts of Defence - with tradeoffs
Goal-
Close the cache based side channel altogether
Maintain communication between OS and users
Minimal modifications to hardware
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Earlier… Set Partitioning at Page level
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Proposed - Way Partitioning
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Way 1 |
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Index |
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255 |
Way 2 |
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Way 3 |
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Way 4 |
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Thread 1
Thread 2
Intel Cache Allocation Technology (CAT)
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Way 1 |
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Index |
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255 |
Way 2 |
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Way 3 |
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Way 4 |
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Looking For Hits
Insecure Way Partitioning - still vulnerable
Victim Selection
DAWG - Secure Way Partitioning
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Way 1 |
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Index |
0 |
1 |
2 |
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255 |
Way 2 |
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Way 3 |
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Way 4 |
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Looking For Hits
Victim Selection
Implementation-Policy Tables
For a 2 way set associative Cache
Stored in Model Specific registers(MSR)
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domain_id | policy_fillmap | policy_hitmap | ||
| Way 0 | Way 1 | Way 0 | Way 1 |
0 | 1 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
Dynamic Reallocation
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Consider re-allocating Way 1 to Domain 0
domain_id | policy_fillmap | policy_hitmap | ||
| Way 0 | Way 1 | Way 0 | Way 1 |
0 | 1 | 0 | 1 | 0 |
1 | 0 | 1->0 | 0 | 1 |
Step 1
Update policy_fillmap of Way 1
Dynamic Reallocation
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Consider re-allocating Way 1 to Domain 0
domain_id | policy_fillmap | policy_hitmap | ||
| Way 0 | Way 1 | Way 0 | Way 1 |
0 | 1 | 0 | 1 | 0 |
1 | 0 | 0 | 0 | 0 |
Step 2
Flush
Flush Way 1 from all sets
Dynamic Reallocation
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Consider re-allocating Way 1 to Domain 0
domain_id | policy_fillmap | policy_hitmap | ||
| Way 0 | Way 1 | Way 0 | Way 1 |
0 | 1 | 0 | 1 | 0 |
1 | 0 | 0 | 0 | 1->0 |
Step 3
Update policy_hitmap of Way 1
Dynamic Reallocation
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Consider re-allocating Way 1 to Domain 0
domain_id | policy_fillmap | policy_hitmap | ||
| Way 0 | Way 1 | Way 0 | Way 1 |
0 | 1 | 0->1 | 1 | 0->1 |
1 | 0 | 0 | 0 | 0 |
Step 4
Update MSRs for new allocation
Cache Coherence
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Metadata leak - NRU Replacement
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Metadata leak - NRU Replacement
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Do we get our promised isolation?
Yes!
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However…Some Limitations
API call- a[b[i]] (i provided by receiver)
Receiver calls using a[j] - latency affected when b[i]=j
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Evaluation Setup - Simulation
Using CAT as baseline
Most benchmarks have 4-7% slowdown
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Evaluation Setup - Hardware
Haswell
20-way 30MB
L3 cache
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Conclusion
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Conclusion
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Conclusion
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DAWG- What we hope to achieve
Overcomes the problems
DAWG offers the desired partitioning
mechanism; we additionally enable two-way communication
between OS and applications, and handle mutually untrusted
peers at the same security level. We allow deduplication, shared
libraries, and memory mapping, which in prior work must all
be disabled.
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DAWG Isolation Policies
Try making own 4 way
Isolated cache
Show dynamic also, by
changing number of ways allocated
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Problem- technical
Cache Tag State (animate)
Cache Metadata Based (remove)
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