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Hybrid InP to Si Photonics Integration: �Bonding, Alignment, and Optical Performance

Electronics Packaging Symposium

Binghamton, NY

9 September 2026

Sarah Baranowski,

Javery Mann, Amit Dikshit, Colin McDonough, David L. Harame

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Outline

Introduction to AIM Photonics
AIM Photonics electronic-photonic interposers
On-chip laser integration

Die-to-wafer alignment accuracy
Coupling results and EPDA efforts
PDK component release

Conclusions

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AIM Photonics Overview

AIM Photonics’�Test, Assembly & Packaging

Rochester, NY

NY Creates’ Albany �NanoTech Complex

Albany, NY

Advanced photonics and packaging infrastructure

Make technology accessible

Build a skilled workforce

AIM Photonics is a DoD-sponsored Manufacturing Innovation Institute chartered with advancing integrated photonic circuit manufacturing technology development in the United States.

MISSION

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Our vision is to be a U.S.-based world leader in PIC and photonic packaging design and manufacturing, and to bridge the gap between R&D and product development.

We are working toward this vision through our three-pronged mission.

AIM Photonics is tasked to:

Advance the photonics and packaging ecosystems
Make the technology accessible
Build a skilled workforce

We conduct our wafer prototyping and test, assembly and packaging services through two centers of operations:

Albany NanoTech Complex

State-of-the-Art 300mm Si Photonic Integrated Circuit (PIC) & Heterogeneous Integration (HI) Technology
>130K square feet of class-1 capable cleanroom space

Rochester, NY Test, Assembly & Packaging (TAP) Facility

Advanced electronic-photonic packages
Our state-of-the-art 300 mm test, assembly, and packaging facility in Rochester is the only accessible 300 mm electronic/photonic packaging facility in the U.S.
12K square feet of class-1000 cleanroom space

We provide advanced packaging services for wafers processed in Albany or wafers provided by customers

New AI/HI Center in Albany is developing heterogeneous integration (on-wafer) packaging technologies

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END-TO-END�SILICON�PHOTONICS�MANUFACTURING

We support electronic photonic design automation from chip to package.

PROCESS DESIGN

Our wafers are built in a state-of-the-art 300 mm silicon fabrication facility at the Albany NanoTech Complex in Albany, New York.

MULTI-PROJECT WAFERS

Our test, assembly and packaging services offer designers and developers an advanced tool set for photonic and electronic packaging operations.

TEST, ASSEMBLY AND �PACKAGING

TECHNOLOGY�OFFERINGS

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Our technology offerings provide an end-to-end silicon photonics manufacturing flow.

Our Process Design Kits support electronic photonic design automation from chip to package. We support all major EPDA tools (including Cadence, Synopsys, and Klayout), enabling designers to choose the appropriate technology and design IP specific to their application, performance and business needs.

We reduce the barrier to entry for access to the silicon photonics technology through our multi-project wafer offerings, where organizations pay for space on a wafer rather than the whole wafer itself, thus reducing the cost of prototyping by over a factor of 10 for one chip design

Our test, assembly, and packaging facility in Rochester, New York provides advanced wafer-level and die-level test and assembly for electronic and photonic packaging.

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AIM Photonics Production PIC MPW Technology Offerings

Electronic Interposer

AIM Photonics has a regular schedule of its best-in-class, mature 300 mm PIC and interposer MPW runs.

Cost-saving path
Fastest 300 mm MPW turnaround time
Active and passive PIC, sensors low-loss SiN, and electronic interposers

Passive PIC

Active PIC

Low Loss SiN

https://www.aimphotonics.com/mpw

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AIM Photonics has a regular schedule of its best-in-class, mature 300 mm PIC and interposer MPW runs.

MPW services shorten design time, improve manufacturing efficiency, and lower the price of entry for companies to develop new silicon photonics applications.

Active PIC: Si and SiN waveguides with active devices, Ge PD, two wiring levels and an AI termination pad
Passive PIC: Passive elements only: silicon and silicon nitride waveguides
Ultra low-loss/low-fluorescence silicon nitride waveguide and a sensing trench to selectively expose the nitride waveguide

Electronic Interposer

The electronic interposer is a silicon (Si) wafer used for enabling 2.5D integration of photonic and electronic integrated circuits for advanced packaging.

Copper lines on the top surface are routed to a backside Cu redistribution layer (RDL) using thru-silicon vias (TSVs). The terminal metal can be bumped (Cu pillar, C2, or C4 solder bumps) for flip-chip packaging.

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Multi-Project Wafer (MPW) Program

Dependable regular schedule of runs
Robust base offerings with superior quality
Rapid turnaround and delivery
MPW tiles reduce cost from purchasing entire runs

Advantages

Dependable schedule
Robust base offerings with superior quality
Rapid turnaround and delivery
Reduces cost from purchasing entire wafer

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AIM Photonics’ 300 mm Wafer-Level Heterogeneous Integration (HI)

These are AIM Photonics’ processes running in the 300 mm wafer HI center in Albany, NY

Heterogeneous Integration (HI) is defined as the integration of separately manufactured components into a higher-level assembly (chiplets, SiPs, modules) that, in the aggregate, provides enhanced functionality and improved operating characteristics.

Die-to-wafer

DFB Laser

PIC

Dense bumping

C4

100 µm pitch SnAg

50 µm pitch CuP w/SnAg cap

23 µm pitch CuP

Temporary wafer bonding, thinning, & RDL

Source: AMD Hot Chips 2021

Wafer-to-wafer bonding / de-bonding

Hybrid bonding

Under development

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AIM Photonics CPO

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AIM Photonics Interposer Platforms

Interposers efficiently interconnect ICs and fan out for external connections.
AIM Photonics is a reliable U.S.-based source for electronic and electronic-photonic interposers. AIM Photonics fills the application niche by providing an accessible, customizable platform.

Electronic Interposer

Electrically interconnects various IC chips to assemblies and the outside world
Datacom/telecom, low-SWaP-C applications
Fully customizable interposers

Electronic-Photonic Interposer

Photonic integrated circuit (PIC) fabricated into the interposer
Datacom/telecom, low-SWaP-C and high-functionality, including laser light-source
Best-in-class, low-loss PICs integrated into the interposer

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Next-gen Electronic-Photonic Interposer

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Advanced packaging enables high-density, high-bandwidth, next-gen 3D PICs

300 mm wafers hybrid bonded together

3D integration for co-packaged optics:

Best shoreline & area bandwidth density
Massive wavelength scalability
Benefits from advanced CMOS technology nodes hybrid bonded to PIC

Key enabling technologies:

Low-loss photonics processes
Hybrid bonding
Backside Cu RDL
Cu pillar or solder ball assembly
On-chip laser light source

2.5D CPO

3D CPO

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On-Chip Laser Integration

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Laser/Optical Amplification Integration

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Adapted from: Shekhar, S., Bogaerts, W., Chrostowski, L., Bowers, J. E., Hochberg, M., Soref, R., & Shastri, B. J. (2023). Silicon Photonics--Roadmapping the Next Generation. arXiv preprint arXiv:2305.15820.

On-chip light sources are becoming more attractive due to tight integration with the PIC and low-coupling losses
Utilize known good die (KGD) from commercial vendors (leverage existing infrastructure and expertise)
For lower volumes and to maximize yield, flip-chip laser integration is preferred

Integration	Conventional off-chip	Off-chip with FSO	Off-chip with PWB	2.5D HI (flip-chip/µTP)	Hybrid III-V coupon (Direct bonding/µTP)	Monolithic (heteroepitaxy)
Coupling Loss	>2dB	>2dB	>2dB	1dB	1dB	Few dB
Output Power	High	High	High	Medium	Medium	Low
Polarization Control	Needed	Needed	No Need	No Need	No Need	No Need
Thermal Management	Easy	Easy	Easy	Medium-Difficult	Difficult	Medium
Linewidth Reduction	N/A	Good	Good	Good	Best	Good
Assembly Size	Large	Medium	Medium	Small	Smallest	Smallest
On-chip	No	No	No	Yes	Yes	Yes
Packaging Style	KGD	KGD	KGD	KGD	All or nothing	All or nothing

ISO

FSO

Gain material

PWB

bond

Conventional off-chip laser

Off-chip laser with FSO

FSO

Off chip with Photonic Wire Bond (PWB).

2.5D HI (flip chip or transfer printing)

Hybrid III-V coupon with direct bonding or transfer printing on silicon

Monolithic (Heteroepitaxy)

Adapted from: Shekhar, Sudip, et al. "Roadmapping the next generation of silicon photonics." Nature Communications 15.1 (2024): 751.

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Laser Integration Approaches at AIM Photonics

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Heterogeneous Integration

+ COTS lasers with Known-Good-Die

+ Low-loss coupling

High-precision alignment required
Low scalability

AIM Photonics Offering Maturity:

PDK in dev., cust. prototypes

Micro-Transfer Printing

+ Medium scalability

+ Medium density

- Complex fabrication

- Unproven bond yield & reliability

AIM Photonics Offering Maturity:

Need laser vendor for volume

Monolithic Hetero-Epitaxy

+ Most scalable

+ Dense, compact integration

Perf. & reliability limited by TDD
Limited to O-band presently

AIM Photonics Offering Maturity:

PDK beta

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Die and Flip-Chip Bonding Tools

Finetech FINEPLACER Femto2 (TAP)

Accuracy ±0.3 µm @ 3 sigma
Bond force up to 40 N
Min Cycle Time 20 sec
Assembly of chip and micro-optics (WDM, optoelectronic components, micro-lenses, micro- mechanics)
Epoxy dispense, flux dip station, automated die flip station
Eutectic bonding via heating plate and heated tool vacuum tip
Passive alignment
UV cure

ASM Amicra NANO (Albany)

300 mm wafer handling
Accuracy ±0.2 µm @ 3 sigma
Cycle Time < 35 sec
Assembly of chip and micro-optics (WDM, optoelectronic components, micro-lenses, micro- mechanics)
Epoxy stamping and dispensing
Eutectic bonding via diode-laser or heating plate
Passive alignment
UV cure

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Vertical Alignment – Mechanical Shelves

Laser flipped chip bonded into laser cavity with mechanical stop “shelves”

Shelves set vertical (z) alignment

Thick solder provides a larger process window for vertical alignment, leveraging solder compression and squeeze-out to align devices
0.5 µm vertical misalignment leads to ~4-5 dB optical coupling loss for small vertical mode devices (~1 µm)

Thick solder reduces vertical alignment variability

Laser

PIC Cavity

Bonded Assembly

Flipped

TCB

Deposited Solder

Courtesy Analog Photonics

Coupling Efficiency

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Horizontal Alignment – Die Bond Tool

Laser is carefully alighted to the lateral position of the waveguide

The larger horizontal laser mode provides some tolerance to horizontal misalignment
Horizontal (x/y) alignment is controlled by the pick and place tool (<0.5 µm claimed accuracy)
Our experiments show cold placement meets tool spec, but after heating and solder reflow alignment accuracy increases to 1 µm

Laser Misalignment at Place (µm) Laser Misalignment at Bond (µm)

Coupling Efficiency

Courtesy Analog Photonics

Waveguide

y

x

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Freedom Photonics Attachment & Alignment

Freedom Photonics DFB lasers are placed within ± 1 µm accuracy (calculated after reflow)
The assembly program stores alignment data and feeds back into next bond alignment sequence to improve over time

Laser flip chip bonded to PIC

Freedom Photonics DFB

PIC laser trench

Laser on PIC

NOTE: Bonding parameters changed between bonding runs 5 and 6

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Absolute Displacement Vector

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The in-plane absolute displacement vector (x,y misalignment values) has been found to have the strongest correlation with coupled power
The team is investigating including vertical offset (z) data to get a 3D displacement vector

z height offset cannot be easily measured by the die bonder, but has the highest sensitivity to misalignment according to simulations (minor diameter of elliptical mode profile)

Output

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Electronic Photonic Design Automation

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EPDA Lab Setup for Automated Electro-Optic Measurements

Wafer and die-level measurements with automated fiber optimization
Keysight Photonics Application Suite (PAS) based polarization resolved measurements

Automated Fiber optimization using Hexapods and Nanocubes

Laser Padset for optical and electrical measurements

Automated Measurement Setup

Fiber array

Probes to bias laser

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Laser LIV Characterization Structures

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New redesigned test structure

On-wafer self-contained structures for standard DC characterization
Independent characterization of detector and grating couplers
Rapid, automated testing

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Laser LIV Characterization Structures

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New redesigned test structure

On-wafer self-contained structures for standard DC characterization
Independent characterization of detector and grating couplers
Rapid, automated testing

Highest performing devices reach coupling losses up to 0.6dB

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Edge Couplers

Ten unique edge couplers tested to screen laser misalignment tolerance and coupling efficiency

1

2

3

4

5

6

7

8

9

10

Num	Comments	Description
1	Conventional Taper (FN)	Taper W=500um
2	Trident Taper (FN)	Lateral misalignment tolerance of +/-0.5um
3	Conventional Taper OMC (FN)	Oxide mode converter
4	Trident Taper OMC (FN)	Trident with Oxide Mode converter
5	Trident: FN + SN + Si	Lateral and Vertical tolerance, Multi-layer coupler
6	Trident: FN + SN	Vertical Tolerance, Multi-layer coupler
7	Taper: FN + SN V2	SN Taper for debug and +ve vertical misalignment V2
8	Taper: Si Only	Si Taper for debug and –ve vertical misalignment
9	Taper: Si Only v2	Si Taper for debug and –ve vertical misalignment V2
10	Taper: SN Only	SN Taper for debug and +ve vertical misalignment V2

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Five Coupler Designs

X

Re(E_Y)

Z

Air

Substrate

Laser

1

2

3

4

5

Design	MFDx (µm)	MFDy (µm)
Laser	5.51	1.39
1	9.91	5.3
2	4.10	3.19
3	3.72	2.81
4	2.43	2.05
5	4.74	4.35

X

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Simulation and Experimental Results Compared

2D results are ideal, with no air gap

Without air gap, 3Fork elliptical mode is best

3D results meant to replicate best case experiment, more realistic losses included

Air gap makes laser mode more rounded

Best experimental result from 5Fork design, simulation predicted 4Fork

5Fork and 4Fork more rounded & smaller mode than 3Fork, which is more elliptical

Coupler	Experimental Loss (dB)	2D No-Gap Overlap Loss (dB)	3D FDTD Total Loss (dB)
FN-LongTaper	-4.31	-3.0	-4.3
FN-3Fork	-3.93	-1.3	-3.4
FNSN-4Fork	-3.18	-1.5	-3.0
FNSNSE-5Fork	-3.14	-1.9	-3.5
SN-ShortTaper	-3.30	-2.9	-4.0

Table of Experimental and Modeled Coupling Results

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New method for rapidly evaluating edge coupler performance

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Example data

A new setup has been demonstrated using the Ficontec fiber attach tool to scan a laser assembly over a PIC edge coupler surface (x,y,z) to generate contour plots of coupled power.
PICs with many edge coupler coupling into PDs allow for quick evaluation of coupling efficiency and misalignment tolerance without the need to sacrifice laser die or use large trench structures that limit design variants.

PIC

Experimental setup – Ficontec gripper will hold the gripper handle on the emitter board to scan xyz

Detector board

PIC w/ edge couplers

Emitter board

Laser on a Si chip for mechanical stability

Axial

Rotational

dotted line 🡪 1 dB loss

Translational

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Integrated On-Chip Laser (IOCL) PDK Update

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Available now:

Future:

EPDA Support

Key parameters	Spec.
Operating wavelength	1550 nm
Min. power into PIC @ 300 mA	> 56 mW
Max. loss @ 300mA	< 2.5 dB
Linewidth	< 100 kHz
RIN @ 10 kHz-100MHz	< -140 dB/Hz
SMSR	> 60 dB

Freedom Photonics 1550 nm DFB lasers will be the first available laser on the ACT1 MPW platform.
PDK updated on June 30, 2026, includes new data and an initial laser model.
Laser component will drive additional fabrication & assembly time to base PIC MPW.
Fixed additional IOCL pricing to be released on our website – Stay tuned!

RIN

Linewidth

Spectra

LIV & Loss

LIV v temp

Threshold current fit: I_th(T)

Compact Model

Using Freedom Photonics 1550 nm DFB lasers

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Summary

AIM Photonics has end-to-end, accessible, 300 mm silicon photonics technology

Photonic Integrated Circuit (PIC) MPW offerings with PDK design support
Test, Assembly, and Packaging (TAP) specializing in electronic-photonic packaging

Heterogeneous, on-chip laser integration demonstrates

Best-of-breed gain chips and KGD to maximize yield
High placement accuracy ± 1 µm
High coupling efficiency (< 2-3 dB)
Advanced packaging processing post-fab
Wafer-scale die attachment

Test automation and simulation has resulted in

Rapid wafer-scale characterization of detector and grating couplers
Optimized 4 and 5-fork coupler design

Freedom Photonics C-Band DFB beta PDK component enabled in ACT1 PDK, with power into PIC of >56 mW, and coupling loss of 2.5 dB @300 mA

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Acknowledgements

Test, Assembly & Packaging

Dr. George T. Nelson

Peter McGarvey

Dr. Anthony Aiello

Dr. Christopher Striemer

Albany NanoTech Complex

Melika Momenzadeh

Dr. M. Rakib Uddin

Amir Begovic

Dr. Jin Wallner

Javery Mann

Dr. Colin McDonough Dr. Amit Dikshit

Dr. David Harame

This material is based on research sponsored by the Air Force Research Laboratory under AIM Photonics (agreement number FA8650-21-2-1000). The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright notation therein. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the United States Air Force, the Air Force Research Laboratory or the U.S. Government.

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