1 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

ADDI r3,#2

LD r3,(r1)

LDLI r1,#0

0

2 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

ADDI r3,#2

LD r3,(r1)

LDLI r1,#0

0

ST (r1),r3

3 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

ADDI r3,#2

LD r3,(r1)

U

ST (r1),r3

4 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

NOP

LDLI r1,#0

0

LD r3,(r1)

NOP

パイプラインストール

5 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

NOP

LD r3,(r1)

NOP

NOP

6 of 11

レジスタファイルのフォワーディング

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

7 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

NOP

LDLI r1,#0

0

LD r3,(r1)

ストールサイクルの減少

NOP

8 of 11

ALUからのフォワーディング

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

9 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

ADDI r3,#2

LD r3,(r1)

LDLI r1,#0

10 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

ADDI r3,#2

LD r3,(r1)

LDLI r1,#0

ST (r1),r3

11 of 11

Instruction

Memory

＋

Data

Memory

ALU

2

IF

RF

EX

WB

IFPC

RFPC

IFIR

RFIR

wadr

rega

regb

regc

a

b

c

Imm.

ADDI r3,#2

LD r3,(r1)

ST (r1),r3