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EE 319K�Introduction to Embedded Systems

Lecture 8: Periodic Timer Interrupts, Digital-to-Analog Conversion, Sound, Lab 6

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

http://users.ece.utexas.edu/~valvano/Volume1/E-Book/C12_Interactives.htm

http://users.ece.utexas.edu/~valvano/Volume1/E-Book/C13_Interactives.htm

Interrupts: read Sections 6.1 to 6.4

Sound: read Sections 6.5 to 6.7

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Agenda

  • Recap
    • PLL
    • SysTick
    • Data structures
    • FSMs, linked structure

​

  • Lab 6 Agenda
    • Periodic Interrupts
      • Multithreading
    • Digital to Analog Conversion
    • Sound generation
    • Modular design

​

​

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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Interrupts

  • An interrupt
    • Automatic transfer of software
    • In response to a hardware event
  • Examples
    • Periodically: output to DAC making sound
    • New input: receive new data
    • Output is idle: send more data

​

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

Output one value to DAC

SysTick ISR

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Periodic Interrupts

  • Signal generation output to DAC
    • Audio player (we use the SysTick interrupt to create sound in Lab 6)
    • Wireless communications
  • Data acquisition samples ADC
    • Lab 8 will sample at a fixed rate
  • Digital controller
    • FSM
    • Linear control system (EE362K)

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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ARM Cortex-M Interrupts

  • Arm bit (also called enable)
    • Separate arm bit for each source
    • Software initializes arm bit to 1 to allow interrupts
  • Trigger flag
    • hardware sets trigger when it wishes to request an interrupt
    • software clears the trigger to signify processing done
  • Interrupt priority (0=max to 7=lowest)
    • Higher priority interrupt can suspend a lower ISR
    • Lower/equal priority interrupt will wait until higher is done
  • Interrupt enable (I bit)
    • Global interrupt enable bit, I, in PRIMASK register
    • To enable (I=0), execute CPSIE I EnableInterrupts();
    • To disable (I=1), execute CPSID I DisableInterrupts();

​

​

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

NVIC_ST_CTRL_R, bit 1

Count flag is in NVIC_ST_CTRL_R, bit 16

PRIMASK, bit 0

NVIC_PRI3_R, bits 31-29

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Interrupt Conditions

  • Four conditions must be true simultaneously for an interrupt to occur:
    1. Arm: control bit for each possible source is set
    2. Enable: interrupts globally enabled (I=0 in PRIMASK)
    3. Level: interrupt level must be less than BASEPRI
    4. Trigger: hardware action sets source-specific flag

​

void SysTick_Init(uint32_t period){

NVIC_ST_RELOAD_R = period-1; // reload value

NVIC_ST_CURRENT_R = 0; // any write will reload counter and clear count

NVIC_SYS_PRI3_R = (NVIC_SYS_PRI3_R&0x00FFFFFF)|(2<<29);

NVIC_ST_CTRL_R = 0x07;

}

Priority

Arm

period

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SysTick Example

volatile uint32_t Counts;

int main(void){

PLL_Init(Bus80MHz); // bus clock at 80 MHz

SYSCTL_RCGCGPIO_R |= 0x20; // port F

Counts = 0;

GPIO_PORTF_DIR_R |= 0x0C; // PF3 output

GPIO_PORTF_DEN_R |= 0x0C;

SysTick_Init(80000); // initialize SysTick timer

EnableInterrupts();

while(1){ // interrupts every 1ms, 500 Hz flash

PF3 ^= 0x08; // toggle PF3

}

}

#define PF2 (*((volatile uint32_t *)0x40025010))

#define PF3 (*((volatile uint32_t *)0x40025020))

void SysTick_Handler(void){

PF2 ^= 0x04;

PF2 ^= 0x04;

Counts = Counts + 1;

PF2 ^= 0x04;

}

Minimally intrusive?

How much time?

This is PeriodicSysTickInts starter project

How much time does it take to come in and out of interrupt?

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Interrupt Context Switch

Interrupt Number specifies which ISR is running

IPSR=18 means GPIO Port C

IPSR=15 means SysTick

Vector is a 32-bit pointer

0x3C holds the address of SysTick ISR

0x48 holds the address of Port C ISR

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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Vectors, ISR name and priority

Vector name in Startup.s Priority bits

0x0000003C SysTick_Handler NVIC_SYS_PRI3_R 31 – 29

0x00000058 UART1_Handler NVIC_PRI1_R 23 – 21

0x0000008C Timer0A_Handler NVIC_PRI4_R 31 – 29

0x00000094 Timer1A_Handler NVIC_PRI5_R 15 – 13

0x0000009C Timer2A_Handler NVIC_PRI5_R 31 – 29

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

NVIC_SYS_PRI3_R = (NVIC_SYS_PRI3_R&0x00FFFFFF)|(priority<<29);

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Interrupt Rituals

  • Things you must do in every ritual
    • Initialize data structures (counters, pointers)

​

    • Arm (specify a flag may interrupt)

​

    • Configure NVIC
      • Enable interrupt (NVIC_EN0_R)
      • Set priority (e.g., NVIC_PRI1_R)

​

    • Enable Interrupts
      • Assembly code CPSIE I
      • C code EnableInterrupts();

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

NVIC_ST_CTRL_R = 0x07; // bit1 is arm bit

Count = 0; // global variable

NVIC_SYS_PRI3_R = (NVIC_SYS_PRI3_R&0x00FFFFFF)|(priority<<29);

SysTick skips this step

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Interrupt Service Routine (ISR)

  • Software must do in every ISR
    • Acknowledge
      • Clear trigger flag that requested the interrupt
      • SysTick is different from all other interrupts;
        • automatic acknowledge,
        • Processing the SysTick ISR clears count flag
    • Push/pop R4-R11 if used (AAPCS)
      • Happens automatically in C
      • ISR will be in C, even when EE319H writes in C++
    • Communicate via shared global variables
      • Can be static if communication with same file
      • Should be volatile so compiler does not optimize

Bard, Gerstlauer, Cuevas, Telang, Tiwari, Valvano, Yerraballi

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Ohm’s Law

  • V = I*R

​

​

​

​

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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KVL

  • The voltages around a loop will sum to zero

​

​

​

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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KCL

  • The sum of the currents into a node will equal the sum of the currents leaving

​

​

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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Conversion from Digital to Analog

  • Range
    • 0 to 3.3V
  • Resolution
    • 3.3V/63=0.052V
  • Precision
    • 6 bits
    • 64 alternatives
  • Speed
  • Monotonic

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

http://users.ece.utexas.edu/~valvano/Volume1/E-Book/C13_Interactives.htm

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Build a 1-bit DAC

Digital

PB0

Analog

0

0V

0V

1

3.3V

3.3V

PB0

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Build a 2-bit DAC

Digital

PB1

PB0

Analog

0

0V

0V

0V

1

0V

3.3V

​

2

3.3V

0V

​

3

3.3V

3.3V

3.3V

PB0

PB1

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Build a 3-bit DAC

Digital

PB2

PB1

PB0

Analog

0

0V

0V

0V

0V

1

0V

0V

3.3V

​

2

0V

3.3V

0V

​

3

0V

3.3V

3.3V

​

4

3.3V

0V

0V

​

5

3.3V

0V

3.3V

​

6

3.3V

3.3V

0V

​

7

3.3V

3.3V

3.3V

3.3V

PB0

PB1

PB2

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3 bit DAC

R2

10

kΩ

R1

20

kΩ

R0

40

kΩ

n

PB2

PB1

PB0

​

kohm

equation

Vout (V)

0

0

0

0

​

​

​

0.000

1

0

0

3.3

R2||R1

6.67

3.3*(R1||R2)/(R0+R1||R2)

0.471

2

0

3.3

0

R2||R0

8.00

3.3*(R2||R0)/(R1+R2||R0)

0.943

3

0

3.3

3.3

R1||R0

13.33

3.3*R2/(R2+R1||R0)

1.414

4

3.3

0

0

R1||R0

13.33

3.3*(R1||R0)/(R2+R1||R0)

1.886

5

3.3

0

3.3

R2||R0

8.00

3.3*R1/(R1+R2||R0)

2.357

6

3.3

3.3

0

R2||R1

6.67

3.3*R0/(R0+R2||R1)

2.829

7

3.3

3.3

3.3

​

​

​

3.300

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6-bit Binary-weighted DAC

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

TAs have 47k resistors. What could you use it for?

How do you build a 6-bit DAC

with five 1.5k and five 12k?

PB5

​

PB4

​

PB3

​

PB2

​

PB1

​

PB0

The fundamental principle for a binary weighted DAC is the resistors are binary weighted.

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Static Testing DAC

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

What are range, resolution, precision?

PB5

​

PB4

​

PB3

​

PB2

​

PB1

​

PB0

Connect DAC out to voltmeter without speaker

DAC

+

​

-

3.3

​

​

​

0

0 1 2 3 … 63

Digital

Analog

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DAC testing

  • What does this software do?

const uint32_t Inputs[16]={0,1,7,8,15,16,17,18,31,32,33,47,48,49,62,63};

int voltmetermain(void){ uint32_t i;

DisableInterrupts();

TExaS_Init(SCOPE);

LaunchPad_Init();

DAC_Init(); // your lab 6 solution

i = 0;

EnableInterrupts();

while(1){

Testdata = Inputs[i];

DAC_Out(Testdata); // your lab 6 solution

i=(i+1)&0x0F; // <---put a breakpoint here

}

}

Connect a voltmeter to DAC output and single step (step over)

In simulation mode you can put DACOUT in logic analyzer and set mode to Analog

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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Digital ↔ Analog Conversion

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

Sampled at a fixed time, Δt

fs = 1/Δt

Signal has frequencies 0 to ½fs

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Digital ↔ Analog Conversion

Digital: voltage vs. time

fs = 1/Δt

Signal has frequencies 0 to ½ fs

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

Analog: voltage vs. time

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Look in DAC.xls

  • What is this?

// 6-bit 64-element sine wave

const uint8_t wave[64] = {

32,35,38,41,44,47,49,52,54,56,58,

59,61,62,62,63,63,63,62,62,61,59,

58,56,54,52,49,47,44,41,38,35,

32,29,26,23,20,17,15,12,10,8,

6,5,3,2,2,1,1,1,2,2,3,

5,6,8,10,12,15,17,20,23,26,29};

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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Synchronization

  • Semaphore is a shared flag
    • One thread writes to the flag
    • The other thread tests the flag
  • Mailbox – to be presented for Lab 8
  • FIFO queue – to be presented for Lab 9

Use global variable to communicate

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

Flag=1

Flag=0

Just

Touched

Just

Released

DAC_Out

Flag is 1

Flag is 0

ISR

main

Key=Piano_In();

Set RELOAD

No

change

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Three ways to turn off sound

  • Semaphore is a shared flag
    • One thread writes to the flag
    • The other thread tests the flag

​

  • SysTick arm bit (bit1)
    • Disarm (bit1=0) to stop interrupts
    • Arm (bit1=1) to restart interrupts

​

  • Set RELOAD
    • Reload=0 to stop interrupts
    • Reload>0 to restart interrupts

​

Bard, Gerstlauer, Cuevas, Holt, Telang, Tiwari, Valvano, Yerraballi

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