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EE 319K�Introduction to Embedded Systems

Lecture 4c: Backup slides

Bard, Erez, Gerstlauer, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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Agenda

  • Recap, C programming
    • Switch interface
    • LED interface
    • PWM
  • Outline
    • Conditionals
      • Signed/unsigned
      • CMP
      • Bxx

Bard, Erez, Gerstlauer, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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Conditional Branch Instructions

  • Show in assembly and in C
    • Assume x,y are local unsigned 32-bit variables

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Bard, Erez, Gerstlauer, Valvano, Yerraballi, Telang, Cuevas, Tiwari

x>y

y = x

x≤y

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Conditional Branch Instructions

  • Show in assembly and in C
    • Assume x,y are local signed 32-bit variables

​

Bard, Erez, Gerstlauer, Valvano, Yerraballi, Telang, Cuevas, Tiwari

x>y

y = x

x≤y

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Conditional Branch Instructions

  • Show in assembly and in C
    • Assume x,y are local 32-bit variables

​

Bard, Erez, Gerstlauer, Valvano, Yerraballi, Telang, Cuevas, Tiwari

x bit 2 is set

y = 1

x bit 2 is clear

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System Design

  • What does being in a state mean?
    • List state parameters
  • What is the starting state of the system?
    • Define the initial state
  • What information do we need to collect?
    • List the input data
  • What information do we need to generate?
    • List the output data
  • How do we move from one state to another?
    • Actions we could do
  • What is the desired ending state?
    • Define the ultimate goal

Bard, Erez, Gerstlauer, Holt, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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System Design

  • Successive Refinement
  • Stepwise Refinement
  • Systematic Decomposition

Bard, Erez, Gerstlauer, Holt, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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System Design

  • Start with a task and decompose the task into a set of simpler subtasks
  • Subtasks are decomposed into even simpler sub-subtasks
  • Each subtask is simpler than the task itself
  • Make design decisions
    • document decisions and subtask requirements
  • Ultimately, subtask is so simple, it can be converted to software

Bard, Erez, Gerstlauer, Holt, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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System Design

  • Four building blocks (structured):
    • “do A then do B” → sequential
    • “do A and B in either order” → sequential (parallel)
    • “if A, then do B” → conditional
    • “for each A, do B” → iterative
    • “do A until B” → iterative
    • “repeat A over & over forever” → iterative (condition always true)
    • “on external event do B” → interrupt
    • “every t msec do B” → interrupt

Bard, Erez, Gerstlauer, Holt, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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Successive Refinement

Bard, Erez, Gerstlauer, Holt, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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Successive Refinement

Successive refinement example for iterative approach

Bard, Erez, Gerstlauer, Holt, Valvano, Yerraballi, Telang, Cuevas, Tiwari

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