Digital Modulation Schemes & Information Theory
a simplified block diagram for a digital modulation system.
FIG. ASK TRANSMITTER
ASK Modulator
ASK Demodulator
There are two types of ASK Demodulation techniques. They are −
The clock frequency at the transmitter when matches with the clock frequency at the receiver, it is known as a Synchronous method, as the frequency gets synchronized. Otherwise, it is known as Asynchronous.
Asynchronous ASK Demodulator
The Asynchronous ASK detector consists of a half-wave rectifier, a low pass filter, and a comparator. Following is the block diagram for the same.
The modulated ASK signal is given to the half-wave rectifier, which delivers a positive half output. The low pass filter suppresses the higher frequencies and gives an envelope detected output from which the comparator delivers a digital output.
Synchronous ASK Demodulator
Synchronous ASK detector consists of a Square law detector, low pass filter, a comparator, and a voltage limiter. Following is the block diagram for the same.
The ASK modulated input signal is given to the Square law detector. A square law detector is one whose output voltage is proportional to the square of the amplitude modulated input voltage. The low pass filter minimizes the higher frequencies. The comparator and the voltage limiter help to get a clean digital output.
Frequency Shift Keying (FSK)
where Vfsk(t) = binary FSK waveform
Vc = peak analog carrier amplitude (volts)
fc = analog carrier center frequency(hertz)
f=peak change (shift)in the analog carrier frequency(hertz) Vm(t) = binary input (modulating) signal (volts)
To find the process of obtaining this FSK modulated wave, let us know about the working of a FSK modulator.
FSK Modulator
The FSK modulator block diagram comprises of two oscillators with a clock and the input binary sequence. Following is its block diagram.
The two oscillators, producing a higher and a lower frequency signals, are connected to a switch along with an internal clock. To avoid the abrupt phase discontinuities of the output waveform during the transmission of the message, a clock is applied to both the oscillators, internally. The binary input sequence is applied to the transmitter so as to choose the frequencies according to the binary input.
FSK Demodulator
There are different methods for demodulating a FSK wave. The main methods of FSK detection are asynchronous detector and synchronous detector. The synchronous detector is a coherent one, while asynchronous detector is a non-coherent one.
Asynchronous FSK Detector
The block diagram of Asynchronous FSK detector consists of two band pass filters, two envelope detectors, and a decision circuit. Following is the diagrammatic representation
The FSK signal is passed through the two Band Pass Filters BPFs, tuned to Space and Mark frequencies. The output from these two BPFs look like ASK signal, which is given to the envelope detector. The signal in each envelope detector is modulated asynchronously.
The decision circuit chooses which output is more likely and selects it from any one of the envelope detectors. It also re-shapes the waveform to a rectangular one.
Synchronous FSK Detector
The block diagram of Synchronous FSK detector consists of two mixers with local oscillator circuits, two band pass filters and a decision circuit. Following is the diagrammatic representation.
The FSK signal input is given to the two mixers with local oscillator circuits. These two are connected to two band pass filters. These combinations act as demodulators and the decision circuit chooses which output is more likely and selects it from any one of the detectors. The two signals have a minimum frequency separation.
For both of the demodulators, the bandwidth of each of them depends on their bit rate. This synchronous demodulator is a bit complex than asynchronous type demodulators.
PHASE SHIFT KEYING:
Binary Phase Shift Keying BPSK
Quadrature Phase Shift Keying QPSK
Binary Phase Shift Keying (BPSK)
BPSK Modulator
The block diagram of Binary Phase Shift Keying consists of the balance modulator which has the carrier sine wave as one input and the binary sequence as the other input. Following is the diagrammatic representation.
The modulation of BPSK is done using a balance modulator, which multiplies the two signals applied at the input. For a zero binary input, the phase will be 0° and for a high input, the phase reversal is of 180°.
Following is the diagrammatic representation of BPSK Modulated output wave along with its given input.
The output sine wave of the modulator will be the direct input carrier or the inverted 180°phaseshifted
input carrier, which is a function of the data signal.
BPSK Demodulator
Quadrature Phase Shift Keying (QPSK)
QPSK Modulator
QPSK Demodulator
QPSK transmitter. A block diagram of a QPSK modulator is shown in Figure 2-17Two bits (a dibit) are clocked into the bit splitter. After both bits have been serially inputted, they are simultaneously parallel outputted
FIGURE 2-18 QPSK modulator: (a) truth table; (b) phasor diagram; (c) constellation diagram In Figures 2-18b and c, it can be seen that with QPSK each of the four possible output phasors has exactly the same amplitude. Therefore, the binary information must be encoded entirely in the phase of the output signal
Non-coherent BFSK
Differential Phase Shift Keying (DPSK)
DPSK Modulator
DPSK Demodulator
M-ary Encoding (Modulation techniques)
M-ary Equation:
Types of M-ary Techniques
BANDWIDTH EFFICIENCY
Power Spectral Density
Timing and Frequency (carrier) synchronization
Information Theory:
Conditions of Occurrence of Events:
If we consider an event, there are three conditions of occurrence.
Entropy:
Mutual Information
Properties of Mutual information
Channel Capacity
Noiseless Channel: Nyquist Bit Rate for noiseless channel
Where,
C= Channel Capacity in bps
B= Bandwidth in Hz
m or l= the number of signal levels used to represent data
(or) Nyquist Bit Rate = 2B log2l
Data rate can be calculated using two theoretical formulae:
Nyquist Bit Rate – for noiseless channel
Shannon’s Capacity – for noisy channel
Noisy Channel: Shannon’s Capacity – for noisy channel
or
Where,
C= Channel Capacity in bps (bits per second)
B= Bandwidth of the channel in Hz
S= Average signal power over the bandwidth in watt
N= Average power of the noise and interference over the bandwidth in watts
S/N= Signal to Noise Ratio (SNR) or Carrier to Noise Ratio (CNR) in dB