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Digital Modulation Schemes & Information Theory

  • Coherent Digital Modulation Schemes – ASK, BPSK, BFSK, QPSK, Non-coherent BFSK, DPSK. Mary Modulation Techniques,
  • Power Spectra, Bandwidth Efficiency,
  • Timing and Frequency synchronization.
  • Information theory: Entropy, Mutual Information and Channel capacity theorem.

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  • Digital Modulation provides more information capacity, high data security, quicker system availability with great quality communication. Hence, digital modulation techniques have a greater demand, for their capacity to convey larger amounts of data than analog ones.
  • There are many types of digital modulation techniques and we can even use a combination of these techniques as well.

a simplified block diagram for a digital modulation system.

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  • AMPLITUDE-SHIFT KEYING (ASK):
  • The simplest digital modulation technique is amplitude-shift keying (ASK), where a binary information signal directly modulates the amplitude of an analog carrier. ASK is similar to standard amplitude modulation except there are only two output amplitudes possible. Amplitude-shift keying is sometimes called digital amplitude modulation (DAM).
  • The amplitude of the resultant output depends upon the input data whether it should be a zero level or a variation of positive and negative, depending upon the carrier frequency.
  • Amplitude Shift Keying (ASK) is a type of Amplitude Modulation which represents the binary data in the form of variations in the amplitude of a signal.
  • Following is the diagram for ASK modulated waveform along with its input.

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  • Any modulated signal has a high frequency carrier. The binary signal when ASK is modulated, gives a zero value for LOW input and gives the carrier output for HIGH input.
  • Mathematically, amplitude-shift keying is

  • Vm(t) is a normalized binary waveform, where + 1 V = logic 1 and -1 V = logic 0. Thus, the modulated wave Vask(t), is either A cos(ωct) or 0. Hence, the carrier is either "on"or "off," That’s why amplitude-shift keying is referred to as on-off keying(OOK).
  • The rate of change of the ASK waveform (baud) is the same as the rate of change of the binary input (bps).

FIG. ASK TRANSMITTER

  • The input binary sequence is applied to the product modulator. The product modulator amplitude modulates the sinusoidal carrier .it passes the carrier when input bit is ‘1’ .it blocks the carrier when input bit is ‘0.’

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ASK Modulator

  • The ASK modulator block diagram comprises of the carrier signal generator, the binary sequence from the message signal and the band-limited filter. Following is the block diagram of the ASK Modulator.
  • The carrier generator, sends a continuous high-frequency carrier. The binary sequence from the message signal makes the unipolar input to be either High or Low. The high signal closes the switch, allowing a carrier wave. Hence, the output will be the carrier signal at high input. When there is low input, the switch opens, allowing no voltage to appear. Hence, the output will be low.
  • The band-limiting filter, shapes the pulse depending upon the amplitude and phase characteristics of the band-limiting filter or the pulse-shaping filter.

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ASK Demodulator

There are two types of ASK Demodulation techniques. They are −

  • Asynchronous ASK Demodulation/detection
  • Synchronous ASK Demodulation/detection

The clock frequency at the transmitter when matches with the clock frequency at the receiver, it is known as a Synchronous method, as the frequency gets synchronized. Otherwise, it is known as Asynchronous.

Asynchronous ASK Demodulator

The Asynchronous ASK detector consists of a half-wave rectifier, a low pass filter, and a comparator. Following is the block diagram for the same.

The modulated ASK signal is given to the half-wave rectifier, which delivers a positive half output. The low pass filter suppresses the higher frequencies and gives an envelope detected output from which the comparator delivers a digital output.

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Synchronous ASK Demodulator

Synchronous ASK detector consists of a Square law detector, low pass filter, a comparator, and a voltage limiter. Following is the block diagram for the same.

The ASK modulated input signal is given to the Square law detector. A square law detector is one whose output voltage is proportional to the square of the amplitude modulated input voltage. The low pass filter minimizes the higher frequencies. The comparator and the voltage limiter help to get a clean digital output.

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Frequency Shift Keying (FSK)

  • The frequency of the output signal will be either high or low, depending upon the input data applied.
  • Frequency Shift Keying (FSK) is the digital modulation technique in which the frequency of the carrier signal varies according to the discrete digital changes. FSK is a scheme of frequency modulation.
  • Following is the diagram for FSK modulated waveform along with its input.
  • The output of a FSK modulated wave is high in frequency for a binary HIGH input and is low in frequency for a binary LOW input. The binary 1s and 0s are called Mark and Space frequencies.

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  • FSK is a form of constant-amplitude angle modulation similar to standard frequency modulation (FM) except the modulating signal is a binary signal that varies between two discrete voltage levels rather than a continuously changing analog wave form. Consequently, FSK is sometimes called binary FSK (BFSK). The general expression for FSK is

where Vfsk(t) = binary FSK waveform

Vc = peak analog carrier amplitude (volts)

fc = analog carrier center frequency(hertz)

f=peak change (shift)in the analog carrier frequency(hertz) Vm(t) = binary input (modulating) signal (volts)

  • The modulating signal is a normalized binary waveform where a logic 1 = + 1 V and a logic 0 = -1 V. Thus, for a logic 1 input, Vm(t) a logic 0 input, Vm(t) = -1, Equation becomes
  • With binary FSK, the carrier center frequency (fc) is shifted (deviated) up and down in the frequency domain by the binary input signal.
  • Frequency shift keying (FSK) is a relatively simple, low-performance form of digital modulation.  Binary FSK is a form of FSK where the input signal can have only two different values (hence the name binary). Binary FSK is a constant-envelope form of angle modulation similar to conventional frequency modulation except that the modulating signal varies between two discrete voltage levels (i.e., 1’s and 0’s) rather than with a continuously changing value, such as a sine wave.

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  • Binary FSK is the most common form of FSK. With binary FSK, the center or carrier frequency is shifted by the binary input signal. Consequently, the output from an FSK modulator is a step function in the frequency domain. As the binary input signal changes from a logic 0 to logic 1 and vice versa, the FSK output signal shifts between two frequencies; a mark or logic 1 frequency and a space or logic 0 frequency.

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To find the process of obtaining this FSK modulated wave, let us know about the working of a FSK modulator.

FSK Modulator

The FSK modulator block diagram comprises of two oscillators with a clock and the input binary sequence. Following is its block diagram.

The two oscillators, producing a higher and a lower frequency signals, are connected to a switch along with an internal clock. To avoid the abrupt phase discontinuities of the output waveform during the transmission of the message, a clock is applied to both the oscillators, internally. The binary input sequence is applied to the transmitter so as to choose the frequencies according to the binary input.

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FSK Demodulator

There are different methods for demodulating a FSK wave. The main methods of FSK detection are asynchronous detector and synchronous detector. The synchronous detector is a coherent one, while asynchronous detector is a non-coherent one.

Asynchronous FSK Detector

The block diagram of Asynchronous FSK detector consists of two band pass filters, two envelope detectors, and a decision circuit. Following is the diagrammatic representation

The FSK signal is passed through the two Band Pass Filters BPFs, tuned to Space and Mark frequencies. The output from these two BPFs look like ASK signal, which is given to the envelope detector. The signal in each envelope detector is modulated asynchronously.

The decision circuit chooses which output is more likely and selects it from any one of the envelope detectors. It also re-shapes the waveform to a rectangular one.

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Synchronous FSK Detector

The block diagram of Synchronous FSK detector consists of two mixers with local oscillator circuits, two band pass filters and a decision circuit. Following is the diagrammatic representation.

The FSK signal input is given to the two mixers with local oscillator circuits. These two are connected to two band pass filters. These combinations act as demodulators and the decision circuit chooses which output is more likely and selects it from any one of the detectors. The two signals have a minimum frequency separation.

For both of the demodulators, the bandwidth of each of them depends on their bit rate. This synchronous demodulator is a bit complex than asynchronous type demodulators.

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PHASE SHIFT KEYING:

  • The phase of the output signal gets shifted depending upon the input. These are mainly of two types, namely BPSK and QPSK, according to the number of phase shifts. The other one is DPSK, which changes the phase according to the previous value.
  • Phase Shift Keying (PSK) is the digital modulation technique in which the phase of the carrier signal is changed by varying the sine and cosine inputs at a particular time. PSK technique is widely used for wireless LANs, bio-metric, contactless operations, along with RFID and Bluetooth communications.
  • PSK is of two types, depending upon the phases the signal gets shifted. They are −

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Binary Phase Shift Keying BPSK

  • This is also called as 2-phase PSK or Phase Reversal Keying. In this technique, the sine wave carrier takes two phase reversals such as 0° and 180°.
  • BPSK is basically a Double Side Band Suppressed Carrier DSBSC
  • modulation scheme, for message being the digital information.

Quadrature Phase Shift Keying QPSK

  • This is the phase shift keying technique, in which the sine wave carrier takes four phase reversals such as 0°, 90°, 180°, and 270°.
  • If this kind of techniques are further extended, PSK can be done by eight or sixteen values also, depending upon the requirement.

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Binary Phase Shift Keying (BPSK)

  • This is also called as 2-phase PSK (or) Phase Reversal Keying. In this technique, the sine wave carrier takes two phase reversals such as 0° and 180°.
  • BPSK is basically a DSB-SC (Double Sideband Suppressed Carrier) modulation scheme, for message being the digital information.
  • Following is the image of BPSK Modulated output wave along with its input.
  • The simplest form of PSK is binary phase-shift keying (BPSK), where N = 1 and M = 2.Therefore, with BPSK, two phases (21 = 2) are possible for the carrier. One phase represents a logic 1, and the other phase represents a logic 0. As the input digital signal changes state (i.e., from a 1 to a 0 or from a 0 to a 1), the phase of the output carrier shifts between two angles that are separated by 180°. Hence, other names for BPSK are phase reversal keying (PRK) and bi-phase modulation. BPSK is a form of square-wave modulation of a continuous wave (CW) signal.

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BPSK Modulator

The block diagram of Binary Phase Shift Keying consists of the balance modulator which has the carrier sine wave as one input and the binary sequence as the other input. Following is the diagrammatic representation.

The modulation of BPSK is done using a balance modulator, which multiplies the two signals applied at the input. For a zero binary input, the phase will be  and for a high input, the phase reversal is of 180°.

Following is the diagrammatic representation of BPSK Modulated output wave along with its given input.

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The output sine wave of the modulator will be the direct input carrier or the inverted 180°phaseshifted

input carrier, which is a function of the data signal.

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BPSK Demodulator

  • The block diagram of BPSK demodulator consists of a mixer with local oscillator circuit, a bandpass filter, a two-input detector circuit. The diagram is as follows.
  • By recovering the band-limited message signal, with the help of the mixer circuit and the band pass filter, the first stage of demodulation gets completed. The base band signal which is band limited is obtained and this signal is used to regenerate the binary message bit stream.
  • In the next stage of demodulation, the bit clock rate is needed at the detector circuit to produce the original binary message signal. If the bit rate is a sub-multiple of the carrier frequency, then the bit clock regeneration is simplified. To make the circuit easily understandable, a decision-making circuit may also be inserted at the 2nd stage of detection.

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Quadrature Phase Shift Keying (QPSK)

  • This is the phase shift keying technique, in which the sine wave carrier takes four phase reversals such as 0°, 90°, 180°, and 270°.
  • If this kind of techniques are further extended, PSK can be done by eight or sixteen values also, depending upon the requirement. The following figure represents the QPSK waveform for two bits input, which shows the modulated result for different instances of binary inputs.
  • QPSK is a variation of BPSK, and it is also a DSB-SC (Double Sideband Suppressed Carrier) modulation scheme, which send two bits of digital information at a time, called as bigits.
  • Instead of the conversion of digital bits into a series of digital stream, it converts them into bit-pairs. This decreases the data bit rate to half, which allows space for the other users.

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QPSK Modulator

  • The QPSK Modulator uses a bit-splitter, two multipliers with local oscillator, a 2-bit serial to parallel converter, and a summer circuit. Following is the block diagram for the same.
  • At the modulator’s input, the message signal’s even bits (i.e., 2nd bit, 4th bit, 6th bit, etc.) and odd bits (i.e., 1st bit, 3rd bit, 5th bit, etc.) are separated by the bits splitter and are multiplied with the same carrier to generate odd BPSK (called as PSKI) and even BPSK (called as PSKQ). The PSKQ signal is anyhow phase shifted by 90° before being modulated.
  • The QPSK waveform for two-bits input is as follows, which shows the modulated result for different instances of binary inputs.

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QPSK Demodulator

  • The QPSK Demodulator uses two product demodulator circuits with local oscillator, two band pass filters, two integrator circuits, and a 2-bit parallel to serial converter. Following is the diagram for the same.

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  • The two product detectors at the input of demodulator simultaneously demodulate the two BPSK signals. The pair of bits are recovered here from the original data. These signals after processing, are passed to the parallel to serial converter.

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QPSK transmitter. A block diagram of a QPSK modulator is shown in Figure 2-17Two bits (a dibit) are clocked into the bit splitter. After both bits have been serially inputted, they are simultaneously parallel outputted

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FIGURE 2-18 QPSK modulator: (a) truth table; (b) phasor diagram; (c) constellation diagram In Figures 2-18b and c, it can be seen that with QPSK each of the four possible output phasors has exactly the same amplitude. Therefore, the binary information must be encoded entirely in the phase of the output signal

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Non-coherent BFSK

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Differential Phase Shift Keying (DPSK)

  • In DPSK (Differential Phase Shift Keying) the phase of the modulated signal is shifted relative to the previous signal element. No reference signal is considered here. The signal phase follows the high or low state of the previous element. This DPSK technique doesn’t need a reference oscillator.
  • The following figure represents the model waveform of DPSK.
  • It is seen from the above figure that, if the data bit is LOW i.e., 0, then the phase of the signal is not reversed, but is continued as it was. If the data is HIGH i.e., 1, then the phase of the signal is reversed, as with NRZI, invert on 1 (a form of differential encoding).
  • If we observe the above waveform, we can say that the HIGH state represents an M in the modulating signal and the LOW state represents a W in the modulating signal.

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DPSK Modulator

  • DPSK is a technique of BPSK, in which there is no reference phase signal. Here, the transmitted signal itself can be used as a reference signal. Following is the diagram of DPSK Modulator.
  • DPSK encodes two distinct signals, i.e., the carrier and the modulating signal with 180° phase shift each. The serial data input is given to the XNOR gate and the output is again fed back to the other input through 1-bit delay. The output of the XNOR gate along with the carrier signal is given to the balance modulator, to produce the DPSK modulated signal.

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DPSK Demodulator

  • In DPSK demodulator, the phase of the reversed bit is compared with the phase of the previous bit. Following is the block diagram of DPSK demodulator.
  • From the above figure, it is evident that the balance modulator is given the DPSK signal along with 1-bit delay input. That signal is made to confine to lower frequencies with the help of LPF. Then it is passed to a shaper circuit, which is a comparator or a Schmitt trigger circuit, to recover the original binary data as the output.

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M-ary Encoding (Modulation techniques)

  • The word binary represents two bits. M represents a digit that corresponds to the number of conditions, levels, or combinations possible for a given number of binary variables.
  • This is the type of digital modulation technique used for data transmission in which instead of one bit, two or more bits are transmitted at a time. As a single signal is used for multiple bit transmission, the channel bandwidth is reduced.

M-ary Equation:

  • If a digital signal is given under four conditions, such as voltage levels, frequencies, phases, and amplitude, then M = 4.
  • The number of bits necessary to produce a given number of conditions is expressed mathematically as

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Types of M-ary Techniques

  • In general, Multi-level M−ary modulation techniques are used in digital communications as the digital inputs with more than two modulation levels are allowed on the transmitter’s input. Hence, these techniques are bandwidth efficient.
  • There are many M-ary modulation techniques. Some of these techniques, modulate one parameter of the carrier signal, such as amplitude, phase, and frequency.

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BANDWIDTH EFFICIENCY

  • Bandwidth efficiency (sometimes called information density or spectral efficiency, often used to compare the performance of one digital modulation technique to another. Mathematical bandwidth efficiency is

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Power Spectral Density

  • The function which describes how the power of a signal got distributed at various frequencies, in the frequency domain is called as Power Spectral Density PSD
  • PSD is the Fourier Transform of Auto-Correlation Similarity between observations.
  • It is in the form of a rectangular pulse.

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  • Timing and carrier synchronization is a fundamental requirement for any communication system to work properly.
  • Synchronization is generally considered as a subfield of signal processing.
  • Timing synchronization is the process by which a receiver node determines the correct instants of time at which to sample the incoming signal. Carrier synchronization is the process by which a receiver adapts the frequency and phase of its local carrier oscillator with those of the received signal.
  • Timing synchronization may consist of frame/slot/symbol/chip synchronizations, residual timing tracking, first arrival path search (in terms of OFDMA), multi-path search (in terms of CDMA), etc.
  • Similarly, carrier synchronization may imply integer/fractional frequency offset estimation (in terms of OFDMA), coarse/fine frequency offset estimation (in terms of CDMA), residual frequency offset tracking, etc.
  • Although timing and carrier synchronization are necessary for successful communication.

Timing and Frequency (carrier) synchronization

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Information Theory:

  • Information is the source of a communication system, whether it is analog or digital. Information theory is a mathematical approach to the study of coding of information along with the quantification, storage, and communication of information.

Conditions of Occurrence of Events:

If we consider an event, there are three conditions of occurrence.

  • If the event has not occurred, there is a condition of uncertainty.
  • If the event has just occurred, there is a condition of surprise.
  • If the event has occurred, a time back, there is a condition of having some information.
  • These three events occur at different times. The difference in these conditions help us gain knowledge on the probabilities of the occurrence of events.

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  • When we observe the possibilities of the occurrence of an event, how surprising or uncertain it would be, it means that we are trying to have an idea on the average content of the information from the source of the event.
  • Entropy can be defined as a measure of the average information content per source symbol. Claude Shannon, the “father of the Information Theory”, provided a formula for it as −

Entropy:

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Mutual Information

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Properties of Mutual information

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Channel Capacity

  • The channel capacity, C, is defined to be the maximum rate at which information can be transmitted through a channel. The fundamental theorem of information theory says that at any rate below channel capacity, an error control code can be designed whose probability of error is arbitrarily small. 
  • The maximum data rate for noiseless and noisy channels can be calculated using Shannon’s theorem.

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Noiseless Channel: Nyquist Bit Rate for noiseless channel

  • For a Noiseless Channel, Nyquist theorem gives the relationship between the channel bandwidth and the Maximum data rate that can be transmitted over this channel. According to that, C is given by

Where,

C= Channel Capacity in bps

B= Bandwidth in Hz

m or l= the number of signal levels used to represent data

(or) Nyquist Bit Rate = 2B log2l

Data rate can be calculated using two theoretical formulae:

Nyquist Bit Rate – for noiseless channel

Shannon’s Capacity – for noisy channel

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Noisy Channel: Shannon’s Capacity – for noisy channel

  • For a Noisy Channel, Shannon’s Capacity gives the relationship between the channel bandwidth and the Maximum data rate that can be transmitted over this channel. According to that, C is given by

or

Where,

C= Channel Capacity in bps (bits per second)

B= Bandwidth of the channel in Hz

S= Average signal power over the bandwidth in watt

N= Average power of the noise and interference over the bandwidth in watts

S/N= Signal to Noise Ratio (SNR) or Carrier to Noise Ratio (CNR) in dB

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