Essential Computer Design Concepts
Chapter X
Sections: X, 1.3
Outline
2
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A Word on Binary
3
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Introduction
4
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Unsigned Numbers
5
Decimal | Binary |
0 | 000 |
1 | 001 |
2 | 010 |
3 | 011 |
4 | 100 |
5 | 101 |
6 | 110 |
7 | 111 |
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Exercise
6
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Signed Numbers
7
Decimal | Binary |
-4 | 100 |
-3 | 101 |
-2 | 110 |
-1 | 111 |
0 | 000 |
1 | 001 |
2 | 010 |
3 | 011 |
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The 2s Complement
(-6) 🡪 0110 🡪 1001🡪 1010
(-3) 🡪 0011 🡪 1101
8
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Exercise
9
+17 | |
- 45 | |
- 128 | |
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Hexadecimal System
10
Deccimal | Binary | Hex |
0 | 0000 | 0 |
1 | 0001 | 1 |
2 | 0010 | 2 |
3 | 0011 | 3 |
4 | 0100 | 4 |
5 | 0101 | 5 |
6 | 0110 | 6 |
7 | 0111 | 7 |
8 | 1000 | 8 |
9 | 1001 | 9 |
10 | 1010 | A |
11 | 1011 | B |
12 | 1100 | C |
13 | 1101 | D |
14 | 1110 | E |
15 | 1111 | F |
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Number Width Expansion – Zero Filling
11
1 | 1 | 0 | 1 |
1 | 1 | 0 | 1 |
| | | |
0
0
0
0
13
13
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Number Width Expansion – Sign Extension
12
1 | 0 | 1 | 1 |
1 | 0 | 1 | 1 |
| | | |
1
1
1
1
0 | 0 | 1 | 1 |
0 | 0 | 1 | 1 |
| | | |
0
0
0
0
-5
-5
+3
+3
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Logic Design Conventions
13
Prof. Iyad Jafar
Logic Design Conventions
14
A
B
Y
A
B
Y
+
I0
I1
Y
M�u�x
S
A
B
Y
ALU
F
D
Clk
Q
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Sequential Elements
15
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Sequential Elements
16
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Registers
17
4-bit Register
4-bit Register with load control
(clock gating)
4-bit Register with load control
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Abstract View of Memory
18
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The Computer Memory
19
0
0
1
2
M-1
Bn-1
B1
B0
Address
(Log2 M bits)
Control
Data
(n bits)
Address
Bn-1
B1
B0
Bn-1
B1
B0
Bn-1
B1
B0
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Commanding Computers
20
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The Machine Language
00001 0011 0001 0010
21
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The Assembly Language
ADD Z, X, Y
22
00001 0011 0001 0010
Assembler
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High-Level Language
Z = X + Y
23
ADD Z, X, Y
00001 0011 0001 0010
Assembler
Compiler
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The Big Picture
24
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Below Your Program
25
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Program Execution
26
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Program Execution
27
Fetch
Decode
Execute
End or
Interrupt
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Instruction Set Architecture�(ISA)
28
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What is Instruction Set Architecture (ISA)?
29
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What is Instruction Set Architecture (ISA)?
30
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Core Components of an ISA
31
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Types of ISA
32
CISC | RISC |
Many instructions and addressing modes | Few instructions and addressing modes |
Instructions have different levels of complexity (different size and execution time) | Simple instructions of fixed size (Complex operations are achieved by combining multiple simple instructions) |
Shorter programs | Longer programs |
Relatively slow and expensive | Relatively fast and cheaper |
Intel, AMD, Cyrix | MIPS, Sun SPARC, HP PA-RISC, IBM PowerPC, RISC-V |
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ISA Examples
33
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Extra Readings and Videos
34
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