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Digital Logic Design

CH5: Synchronous Sequential Logic

Part 2:

Sequential Circuits Design

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Finite State Machines

  • State diagrams are representations of Finite State Machines (FSM)
  • Two flavors of FSMs:
    • Mealy FSM
      • Output depends on input and state
    • Moore FSM
      • Output depends only on state

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Design of Sequential Circuits

  1. Derive state diagram from description
  2. Assign binary values to states
  3. Obtain binary coded state table (transition table)
  4. Choose type of flip-flops
  5. Derive flip-flop input equations and output equations
  6. Draw logic diagram

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Example 1: Sequence Detector

  • Circuit specification:
    • Design a circuit that outputs a 1 when three consecutive 1s have been applied to input, and 0 otherwise.”
  • Step 1: derive state diagram
    • What should a state represent?
      • E.g., “number of 1’s seen so far”
    • State diagram:
      • State S0: zero 1s detected
      • State S1: one 1 detected
      • State S2: two 1s detected
      • State S3: three 1s detected

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Example 1: Sequence Detector

  • Step 2: state assignment
    • Two flip-flops
    • Binary state coding

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  • Step 3: Binary coded

state table

    • Name flip-flops A and B

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  • Step 4: Choose type of

flip-flops

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Example 1: Sequence Detector

  • Step 6: derive flip-flop input equations and output equation
    • Use state table

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Example 1: Sequence Detector

  • Step 6b: minimize equations

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Example 1: Sequence Detector

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