OCP NIC Community Update�May 2025

for server project

�����Sub-group Project wiki: https://www.opencompute.org/wiki/Server/NIC�

Mailing List: https://ocp-all.groups.io/g/OCP-NIC

Agenda

• Version 1.6.0 approved & posted
• Thermal Workstream update
• Signal Integrity update
• Thermal Test Fixture Update
• NIC market segment coverage & form factor exploration

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We’re Accepted in the Contribution Database!

OCP NIC 1.6.0 has been formally accepted into the contribution database:

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Thermal Workstream: TSFF Update

• TSFF thermal model simulations complete, need to update into OCP NIC spec
• Reference geometry with OSFP-RHS with heatsink used for simulations
• Wind tunnel configuration implements double stacking; the TSFF under test is on bottom and a duplicate card stacked above is not powered

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Thermal Workstream: XT SFF Study

• Xtra-Tall (XT) height intent to fit in 1U chassis if PCIe CEM card above OCP NIC was removed
• Thermal simulation completed to see potential benefit vs SFF (see table)
• Equivalent to PCIe CEM card (dual slot, low profile, half length)
• Study of single slot, low profile, half length and single slot, full height, half length are WIP
• Need to understand if new height option would offer long term benefit vs causing more complexity with one more option

DSFF SI Update

• Dell contributing DSFF CBB SI fixture, Gen 6 by default
• Schematic & Board files here: Link
• Testing current prototype
• Intel uncovered secondary clock tree missing 100 MHz input clock impacting the secondary connector’s clocks; new board revision required; Intel shows passing results otherwise (report to be uploaded to our google drive)
• Broadcom reporting SSC circuit not �working; currently in debug.

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• For DSFF CLB use two of CLB SFFs, which current Gen 5 fixture able to support Gen 6 SI testing

Reworked CBB to add clock input

DSFF Thermal Test Fixture Overview

• New DSFF TTF will support SFF / TSFF / DSFF form factors at PCIe^® speeds up to Gen 7
• Metal housing with a PCB designed to extend PCIe lanes from a DC-MHS compatible server to a mounted OCP 3.0 DUT card
• Intended to attach to a wind tunnel or flow bench
• Pre-defined sensor locations for test repeatability
• Onboard MCU shall operate same as prior thermal test fixtures and codebase will be uploaded to the Github repository
• Schematic & ECAD complete, uploaded to the OCP NIC Cloud
• Update: protos arrived. Dell & Intel are bringing up units
• Small correctable issues found (ex SMBus mis-wired)
• Next steps
• Get a TTF + OCP NIC to connect to an HPM via MXIO cable
• Continue developing MCU code to support DSFF & SFF DUTs

DSFF Thermal Test Fixture

DSFF TTF Airflow Operation

Please note: PCIE^® design mark is a registered

trademark and/or service mark of PCI-SIG.

What are the public form factors for NICs today?

• These are public form factors from PCI-SIG, OCP & SNIA organizations
• There are also non-public form factors that in-use by hyperscalers & major vendors

PCIe CEM

APEC

SFF

DSFF

PMM

Categories of NICs

1. Low Speed LOM, 1G, 10G served well by RJ45
2. High Speed NIC, mostly use in Front-End/CPU. Could use in Back-end/Accelerator if space allow.
3. Smart NIC with offloading capabilities
4. Ultra High Speed NIC, Back-end/Accelerator focused, High-density

Kick start workstream to evaluate if we need another form factor

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Thank You

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