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FFT ALGORITHM AS A HARDWARE ACCELERATOR TO THE EXISTING RISC-V

THE FFT STANDS FOR FAST FOURIER TRANSFORM, THE FOURIER TRANSFORM BEING THE DISCRETE FOURIER TRANSFORM. IT IS A VERY EFFICIENT WAY TO COMPUTE THE DFT OF A SEQUENCE.

THE FFT ALGORITHM REDUCES AN N-POINT FOURIER TRANSFORM TO ABOUT (N/2) LOG2 (N) COMPLEX MULTIPLICATIONS.

FFT PLAYS A MAJOR ROLE IN DIGITAL SIGNAL PROCESSING, DIGITAL COMMUNICATION AND AUDIO PROCESSING.

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TEAM MEMBERS: DHUSHYANTH S - PES2UG19EC030

DINESH R M - PES2UG19EC031

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8-point FFT

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C-code (software part)

  • We ran our C-code on a 32bit pinaka processor and recorded 57,775 clock cycles which is without hardware accelerator.

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  • OUTPUT:

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HDL ( hardware part)

  • We have written a hardware description in Verilog to improve performance which can act as a hardware accelerator.
  • We have used a 3-Stage register concept for each butterfly stage to store the output values of 8 bit size.
  • Where each register has 8 D Flip-Flop.
  • The D flipflop consists of D latch and a SR latch , here during negative edge of clock the d flipflop acts as a Master and SR latch as slave and during positive edge vice versa.
  • Finally the 16 outputs comes parallelly through 16 registers after computation.

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SIMULATION RESULT - Functionality

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SIMULATION RESULT – Hardware level

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RTL SCHEMATIC

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UTILIZATION REPORT

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APPLICATIONS OF FFT

  • The FFT is used in digital signal processing, digital communication.
  • FFT plays a major role in Audio processing, Radar, Sonar signal processing .
  • FFT has helped in achieving better noise cancellation devices.
  • They are used in sampling frequencies.
  • The FFT is an optimized form of the discrete Fourier transform ,so less calculations have to be performed to achieve the values of DFT.

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