DIGITAL LOGIC AND COMPUTER�ORGANIZATION (24AM202)

Dr. G. Polaiah

Assistant Professor

Department of ECE

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Text Book: Morris Mano, “Computer Systems Architecture”, 3rd edition

Introduction to Computer Organization and Architecture�(Part-1)

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• Computer Organization and architecture:�

• Computer architecture defines how a computer’s components communicate through electronic signals to perform input, processing, and output operations.
• It covers the design and organization of the CPU, memory, storage, and input/output devices.
• Describes how these components interact through buses, control signals, and data pathways.
• It directly influences the overall speed, functionality, and reliability of a computer system.

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• Computer Architecture:

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• Computer Organization:

• Computer organization is the study of the functional behavior of a computer system and its components, specifically focusing on the hardware design and interconnection of parts like the CPU, memory, and input/output devices to execute programs.

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• It encompasses how these physical components are interconnected and organized to perform tasks, contrasting with computer architecture.

Key Aspects of Computer Organization

Physical Components:

It deals with the actual hardware, such as the Central Processing Unit (CPU), memory units, arithmetic and logic units (ALU), and input/output (I/O) devices.

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Interconnections and Data Paths:

Computer organization examines the different ways these components are connected and how data moves between them.

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Control Unit:

It includes the organization of the control unit, which directs the operations of the system

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Example of Functional Units in a Computer

Input Unit: Accepts data and instructions from the user.

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Memory Unit: Stores data and instructions needed for processing.

Arithmetic Logic Unit (ALU): Performs all the calculations and logical operations.

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Output Unit: Displays the processed data to the user.

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Control Unit (CU): Directs the operations of the system by sending control signals to other components

• Register Transfer Language (RTL)

• Register Transfer Language (RTL) is a symbolic notation used to describe the micro operation transfers among registers is called a register transfer language.

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• It represents data transfers between registers and the micro-operations (like arithmetic, logic, and shift) performed on that data.

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• The operations executed on data which is stored in registers are called “micro operations”.

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Text Book: Morris Mano, “Computer Systems Architecture”, 3rd edition

(Page No. 93)

• Examples of micro operations are shift, count, clear, and load.

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• A bidirectional shift register is capable of performing the shift right and shift left micro operations .

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• The term "register transfer" implies the availability of hardware logic circuits that can perform a stated micro operation and transfer the result of the operation to the same or another register.

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• The word "language" is borrowed from programmers, who apply this term to programming languages.

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• RTL is a convenient tool for describing the internal organization of digital computers in concise and precise manner. It can also be used to facilitate the design process of digital systems

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Problem: A digital computer has a common bus system for 16 registers of 32 bits each. The bus is constructed with multiplexers.

1. How many selection inputs are there in each multiplexer?
2. What size of multiplexers are needed?
3. How many multiplexers are there in the bus?

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Answer:

(a) 4 selection lines to select one of 16 registers.

(b) 16 × 1 multiplexers.

(c) 32 multiplexers, one for each bit of the registers.

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Key Components and Operations

• Registers: These are the fundamental storage elements in digital systems that RTL describes.
• Micro-operations: These are the low-level operations performed on the data stored in registers, such as

Arithmetic operations (addition, subtraction)

Logical operations (AND, OR, NOT)

Shift operations

Counting and clearing

• Register Transfer: The process of moving information from one register to another, often using a replacement operator (e.g., R2 ← R1).

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Example�

• A statement like R2 ← R1 in RTL signifies that the contents of register R1 are transferred to register R2. If this transfer needs to happen only under a specific condition, a control function can be added, such as Control Signal: R2 ← R1.

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• Register Transfer

• Computer registers are designated by capital letters (sometimes followed by numerical) to denote the function of the register.

For example:

Memory Address Register (MAR)

Program Counter (PC)

Instruction Register (IR)

Processor Register (R1)

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Text Book: Morris Mano, “Computer Systems Architecture”, 3rd edition

(Page No. 95)

• The individual flip-flops in an n-bit register are numbered in sequence from 0 through n-1, starting from 0 in the rightmost position and increasing the numbers toward the left.

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• Control function

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• A control function is a Boolean variable that is equal to 1 or 0. The control function is included in the statement as follows:

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• Bus and Memory Transfers

• A typical digital computer has many registers, and paths must be provided to transfer information from one register to another.
• A more efficient scheme for transferring information between registers in a multiple-register configuration is a common bus system.
• A bus structure consists of a set of common lines, one for each bit of a register, through which binary information is transferred one at a time.
• Control signals determine which register is selected by the bus during each particular register transfer.

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Three-State Bus Buffers

• A bus system can be constructed with three-state gates instead of multiplexers.

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• A three-state gate is a digital circuit that exhibits three states.

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• Two of the states are signals equivalent to logic 1 and 0 as in a conventional gate. The third state is a high-impedance state.

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• The high-impedance state behaves like an open circuit, which means that the output is disconnected and does not have a logic significance.

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• Three-state gates may perform any conventional logic, such as AND or NAND.

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Memory Transfer

• A memory transfer is a data transfer initiated by the CPU to read information from or write new information into a specific memory location.

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• This process involves coordinating the address, data, and control buses.

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Key registers

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• Memory Address Register (MAR): Holds the address of the memory location being accessed.

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• Memory Data Register (MDR): Also known as the Memory Buffer Register (MBR), it temporarily stores the data being transferred to or from memory.

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Memory transfer operations

Read operation:

• Transfers data from a memory location to a data register.

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• The CPU places the address of the desired memory word in the MAR.

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• It sends a "read" control signal on the control bus.

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• The data from that memory address is placed onto the data bus and transferred into the MDR.

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Symbolic representation: MDR ← M[MAR].

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Write operation:

• Transfers data from a register to a memory location.

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• The CPU places the memory address into the MAR and the data to be written into the MDR.

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• It sends a "write" control signal on the control bus.

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• The data from the MDR is transferred over the data bus to the specified memory location.

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Symbolic representation: M[MAR] ← MDR.

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How bus and memory transfer work together

The CPU uses the bus to perform memory operations by following a sequence of steps:

• Instruction execution: The CPU decodes an instruction that requires memory access (e.g., LOAD or STORE).
• Address placement: The CPU places the memory address onto the address bus via the MAR.
• Control signal: The CPU asserts the appropriate signal (e.g., READ or WRITE) on the control bus.
• Data transfer: The data is transferred along the data bus between the memory (via the MDR) and a CPU register.
• Synchronization: The control bus provides timing signals to ensure that all components act in sync to prevent data corruption.

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Micro operations�(Part-2)

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• Arithmetic micro operations

(a) 4-bit binary adder

• “The digital circuit that generates the arithmetic sum of two binary numbers of any length is called a binary adder.”

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• To implement the add micro operation with hardware, we need the registers that hold the data and the digital component that performs the arithmetic addition.

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• The digital circuit that forms the arithmetic sum of two bits and a previous carry is called a full-adder.

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• The binary adder is constructed with full-adder circuits connected in cascade, with the output carry from one full-adder connected to the input carry of the next full-adder.

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• The augend bits of A and the addend bits of B are designated by subscript numbers from right to left, with subscript 0 denoting the low-order bit.

• The augend bits of A and the addend bits of B are designated by subscript numbers from right to left, with subscript 0 denoting the low-order bit.

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• An n-bit binary adder requires n full-adders.

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• The output carry from each full-adder is connected to the input carry of the next-high-order full-adder.

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• Then data bits for the A inputs come from one register (such as R1), and the n data bits for the B inputs come from another register (such as R2).

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• The sum can be transferred to a third register or to one of the source registers (R 1 or R2),replacing its previous content.

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(b) Binary lncrementer

• The increment micro operation adds one to a number in a register.

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• For example, if a 4-bit register has a binary value 0110, it will go to 0111 after it is incremented.

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• One of the inputs to the least significant half-adder (HA) is connected to logic-1 and the other input is connected to the least significant bit of the number to be incremented.

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• The output carry from one half-adder is connected to one of the inputs of the next-higher order half-adder.

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• The circuit receives the four bits from A0 through A3 adds one to it, and generates the incremented output in S0 through S3.
• The output carry C4 will be 1 only after incrementing binary 1111.

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• Logic micro operations

• Logic micro operations specify binary operations for strings of bits stored in registers.

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• A bit string is a finite, ordered sequence of 0s and 1s.

Examples: 10110, 000, 1, and 101010 are all bit strings.

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• These operations consider each bit of the register separately and treat them as binary variables.

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• For example, the exclusive-OR micro operation with the contents of two registers R 1 and R2 is symbolized by the statement.

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• It specifies a logic micro operation to be executed on the individual bits of the registers provided that the control variable P = 1.

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• Shift Micro operations

• Shift micro operations are used for serial transfer of data.

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• They are also used in conjunction with arithmetic, logic, and other data-processing operations.

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• The contents of a register can be shifted to the left or the right. At the same time that the bits are shifted, the first flip-flop receives its binary information from the serial input.

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• During a shift-left operation the serial input transfers a bit into the rightmost position.

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• During a shift-right operation the serial input transfers a bit into the leftmost position.

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• The information transferred through the serial input determines the type of shift.

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• There are three types of shifts: logical, circular, and arithmetic.

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1. Logical shift

• The circular shift (also known as a rotate operation) circulates the bits of the register around the two ends without loss of information.
• This is accomplished by connecting the serial output of the shift register to its serial input.

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2. Circular shift

• An arithmetic shift is a micro operation that shifts a signed binary number to the left or right.

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• most significant bit (MSB) acts as a sign bit (0 for positive, 1 for negative).

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• A right arithmetic shift of a binary number by 1. The empty position in the most significant bit is filled with a copy of the original MSB..

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• A left arithmetic shift of a binary number by 1. The empty position in the least significant bit is filled with a zero.

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3. Arithmetic shift

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(i) arithmetic shift right

(ii) arithmetic shift left

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Difference between arithmetic shift and logical shift

• Arithmetic Logic Shift Unit

• “Instead of having individual registers performing the micro operations directly, computer systems consists of a number of storage registers connected to a common operational unit called an arithmetic logic unit (ALU).”

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• To perform a micro operation, the contents of specified registers are placed in the inputs of the common ALU.

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• The ALU performs an operation and the result of the operation is then transferred to a destination register.

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• The ALU is a combinational circuit so that the entire register transfer operation from the source registers into the destination register through the ALU can be performed during one clock pulse period.

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One Stage of Arithmetic Logic Shift Unit

• With inputs S1 and S0, a specific micro operation is chosen.

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• At the output, a 4 x 1 multiplexer selects between an arithmetic output and a logic output. Inputs S3 and S2 select the data in the multiplexer.

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• The multiplexer's other two data inputs receive inputs Ai-1 for the shift-right operation(shr) and Ai + 1 for the shift-left operation (shl).

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Basic Computer Organization and Design�(Part-3)

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# Syllabus topics

• Instruction Codes
• Computer Registers
• Computer Instructions
• Instruction Cycle
• Memory Reference Instructions
• Register Reference Instructions
• Input-Output and Interrupt

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• Instruction Codes

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Example:

Consider a computer with 64 distinct operations, one of them being an ADD operation. The operation code consists of six bits, with a bit configuration 110010 assigned to the ADD operation. When this operation code is decoded in the control unit, the computer issues control signals to read an operand from memory and add the operand to a processor register.

• Operand means data on which an operation is to be done.

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• Computer Registers

• Computer instructions are normally stored in consecutive memory locations and are executed sequentially one at a time.
• The control reads an instruction from a specific address in memory and executes it.
• It then continues by reading the next instruction in sequence and executes it, and so on.
• This type of instruction sequencing needs a counter to calculate the address of the next instruction after execution of the current instruction is completed.
• It is also necessary to provide a register in the control unit for storing the instruction code after it is read from memory.

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• The memory unit has a capacity of 4096 words and each word contains 16 bits.
• Twelve bits of an instruction word are needed to specify the address of an operand. This leaves three bits for the operation part of the instruction and one bit to specify a direct or indirect address.
• The data register (DR) holds the operand read from memory. The accumulator (AC) register is a general-purpose processing register. The instruction read from memory is placed in the instruction register (IR). The temporary register (TR) is used for holding temporary data during the processing.

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• Computer Instructions

• The basic computer has three instruction code formats, as shown in below Figure. Each format has 16 bits.

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2. Register - reference instruction
1. The register-reference instructions are recognized by the operation code 111 with a 0 in the leftmost bit (bit 15) of the instruction.
2. A register-reference instruction specifies an operation on or a test of the accumulator (AC) register.
3. An operand from memory is not needed; therefore, the other 12 bits are used to specify the operation or test to be executed.

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c) Input - output instruction

• Similarly, an input-output instruction does not need a reference to memory and is recognized by the operation code 111 with a 1 in the leftmost bit of the instruction.
• The remaining 12 bits are used to specify the type of input-output operation or test performed.

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• Instruction Cycle

• A program residing in the memory unit of the computer consists of a sequence of instructions.

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• The program is executed in the computer by going through a cycle for each instruction.

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• Each instruction cycle in turn is subdivided into a sequence of sub cycles or phases.

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In the basic computer each instruction cycle consists of the following phases:

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1. Fetch an instruction from memory.

2. Decode the instruction.

3. Read the effective address from memory if the instruction has an

indirect address.

4. Execute the instruction.

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Upon the completion of step 4, the control goes back to step 1 to fetch, decode, and execute the next instruction. This process continues indefinitely unless a HALT instruction is encountered.

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• Memory-Reference Instructions

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1. AND to AC
1. This is an instruction that performs the AND logic operation on pairs of bits in AC and the memory word specified by the effective address. The result of the operation is transferred to AC. The micro operations that execute this instruction are:

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3) LDA: Load to AC

• This instruction transfers the memory word specified by the effective address to AC. The micro operations needed to execute this instruction are

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4) STA: Store AC

• This instruction stores the content of AC into the memory word specified by the effective address. Since the output of AC is applied to the bus and the data input of memory is connected to the bus, we can execute this instruction with one micro operation:

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• Register-Reference Instructions

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• Input-Output and Interrupt

• A computer can serve no useful purpose unless it communicates with the external environment.
• Instructions and data stored in memory must come from some input device.
• Computational results must be transmitted to the user through some output device.
• Commercial computers include many types of input and output devices.

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• Input-Output Configuration
• The terminal sends and receives serial information. Each quantity of information has eight bits of an alphanumeric code.
• The serial information from the keyboard is shifted into the input register INPR.
• The serial information for the printer is stored in the output register OUTR.
• These two registers communicate with a communication interface serially and with the AC in parallel.
• The transmitter interface receives serial information from the keyboard and transmits it to INPR.
• The receiver interface receives information from OUTR and sends it to the printer serially.

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• However, when a flag is set, the computer is momentarily interrupted from proceeding with the current program.
• The computer deviates momentarily from what it is doing and completes the task of the input or output transfer.
• It then returns to the current program to continue what it was doing before the interrupt.

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• Program Interrupt
• The external device inform the computer when it is ready for the transfer.
• In the meantime the computer can be busy with other tasks.

(This type of transfer uses the interrupt facility.)

• While the computer is running a program, it does not check the flags.

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Note: A flag is a single binary digit (0 or 1) used to signal for a specific status or condition in a computer's processor.

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