23RIPC303- Embedded systems

Module 2: Introduction to Embedded Systems and�ARM Cortex-M Architecture

Syntax, addressing modes and operands, twelve instructions set, accessing memory, functions, conditional execution, and stack usage and keil directives.

Textbook 2 : Sec 1.5.1-1.5.4,1.5.5,1.5.7,1.5.8,1.5.10

ARM Cortex-M Assembly Language

Syntax �

Assembly instructions have four fields: labels, opcodes,

operands, and comments �

Labels: The label field is optional and starts in the first column and is used to

identify the position in memory of the current instruction. You must choose a unique

name for each label �

ARM Cortex-M Assembly Language

Syntax �

Opcodes or pseudo-ops: The opcode field specifies which processor command to execute �

LDR -- Load Register

STR - Store Register

MOV - Move

PUSH

POP

B - Branch

BL - Branch with Link

BX – Branch and Exchange

ADD

SUB

CPSID – Change Processor State, interrupt Disable

CPSIE - Change Processor State, interrupt Enable �

If there is a label there must be at least one space or one tab between the label and the opcode. If there is no label then there must be at least one space or one tab at the beginning of the line. �

ARM Cortex-M Assembly Language

Syntax �

There are also pseudo-operations (pseudo-ops) that the assembler uses to control different aspects of the assembly process. Unlike opcodes, pseudo-ops do not directly generate machine instructions for execution by the processor. Instead, they provide instructions or information to the assembler during assembly time.

AREA, EQU, IMPORT, EXPORT, and ALIGN

Operands: The operand field specifies where to find the data to execute the instruction. Thumb instructions have 0, 1, 2, 3, or more operands, separated by commas. �

Comments: The comment field is optional and is ignored by the assembler, but allows you to describe the software, making it easier to understand. You can add optional spaces between operands in the operand field. However, a semicolon must separate the operand and comment fields. Good programmers add comments to explain what you are doing, why you are doing it, how it was tested, and how to change it in the future. Everything after the semicolon is a comment �

ARM Cortex-M Assembly Language

Syntax �

The assembler translates assembly source code into object code, which are the machine instructions executed by the processor. All object code is halfword-aligned. With Thumb-2, instructions can be 16 or 32 bits wide, and the program counter bit 0 will always be 0. The listing is a text file containing a mixture of the object code generated by the assembler together with our original source code. ��

Addressing modes and operands �

A fundamental issue in software design is the differentiation between data and addresses. Another name for address is pointer. It is in assembly language programming in general and addressing modes in specific that this differentiation becomes clear. When we put the number 1000 into Register R0, whether this is data

or address depends on how the 1000 is used �The addressing mode is the format the instruction uses to specify the memory location to read or write data. We will see five addressing modes in this class: �

Addressing modes and operands �

No addressing mode : Some instructions operate completely within the processor and require no memory data fetches. For example, the ADD R1,R2,R3 instruction performs R2+R3 and stores the sum into R1. �

Immediate addressing mode: If the data is found in the instruction itself, like MOV R0,#1 , the instruction uses immediate addressing mode. �

Indexed addressing mode: A register that contains the address or location of data is called a pointer or index register. Indexed addressing mode uses a register pointer to access memory. LDR R0,[R1]

LDR R0,[R1,#4]

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PC-relative addressing mode: The addressing mode that uses the PC as the pointer is called PC-relative addressing mode. It is used for branching, for calling functions, and accessing constant data stored in ROM. �

List of twelve instructions �

Let M be the 32-bit value specified by the 12-bit constant #imm12 . When Rd is absent for add and subtract, the result is placed back in Rn . The following lists a few more instructions we will need �

Normally the computer executes one instruction after another in a linear fashion. In particular, the next instruction to execute is typically found immediately following the current instruction. We use branch instructions to deviate from this straight line path. These branches use PC-relative addressing. �

List of twelve instructions �

When pushing and popping multiple registers, it does not matter the order specified in the instruction. Rather, the registers are stored in memory such that the register with the smaller number is stored at the address with a smaller value. For example, consider the execution of PUSH {R1,R4-R6} . Assume the registers R1, R4, R5, and R6 initially contain the values 1, 4, 5, and 6 respectively �

List of twelve instructions �

Stack drawings showing how multiple registered are pushed and popped �

To pop 32-bit data from the stack, first the data are read from the

RAM location pointed to by the SP into a register, and then the SP is incremented

by 4. �

To pop 32-bit data from the stack, first the data are read from the RAM location pointed to by the SP into a register, and then the SP is incremented

by 4. �

Accessing memory �

One of the basic operations we must perform is reading and writing global variables. Since all calculations are performed in registers, we must first bring the value into a register, modify the register value, and then store the new value back into memory. Consider a simple operation of incrementing a global variable in both C and assembly language �

Indexed addressing using R0 as a register pointer to access memory. Data is moved into R1. Code space is where we place programs, and data space is where we place variables. The dotted arrows in this figure represent the motion of information, and the solid arrow is a pointer �

Accessing memory �

As our operating system runs it will need to traverse the list. RunPt will always points to a node in the list. However, we may wish to change it to point to the next node in the list. In C, we would execute RunPt=RunPt->next; However, in assembly this translates to �

A linked list where the second entry is a pointer to the next node. Arrows are pointers or links, and dotted lines are used to label components in the figure

Accessing memory �

R2 now points to the right-most node in the list. The last instruction updates RunPt so it now points to

the right-most node shown in the Figure �

An example of indexed addressing mode with offset, data is in memory. Arrows in this figure represent pointers (not the motion of information).

• Race conditions
• Critical sections
• Atomic operations
• Interrupt protection
• Synchronization

Functions �

Subroutines, procedures, and functions are programs that can be called to perform specific tasks. They are important conceptual tools because they allow us to develop modular software. �

A flowchart of a simple function that adds 1 to a global variable. �

Functions �

While using a register (LR) to store the return address is very effective, it does pose a problem if one function were to call a second function. In Program 1.2 someother calls function �

Conditional execution �

If-then-else control structures are commonly found in computer software. If the BHS or the BGE were to branch, the instruction pipeline would have to be flushed and refilled. In order to optimize execution speed for short if-then and if then-else control structures, the ARM Cortex-M processor employs conditional execution. The conditional execution begins with the IT instruction, which specifies

the number of instructions in the control structure (1 to 4) and the conditional for the first instruction. The syntax is

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IT{x{y{z}}} cond �

where x y and z specify the existence of the optional second, third, or fourth conditional instruction respectively. �

Conditional execution �

Condition code suffixes used to optionally execution instruction. �

Conditional execution �

The following illustrates the use of if-then conditional execution. The

two T’s in ITT means there are two true instructions �

Conditional execution �

The following illustrates the use of if-then-else conditional execution. The one T and

one E in ITE means there is one true and one false instruction. �

Conditional execution �

This macro creates a new assembly instruction that is faster than MUL . This approach can be used to multiply by any constant in the form of 2n±1. If x is a variable, then 15x = (x<<4)-x. �

This approach can also be used to multiply by any constant in the form of 1±2-n. For example, to multiply by 7/8 we implement x - (x>>3). Themacro MUL7_8 is unsigned multiply by 7/8 �

Stack usage �

The stack can be used to store temporary information. If a subroutine modifies a register, it is a matter of programmer style as to whether or not it should save and restore the register. �