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Tania Sanchez

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Introduction

The United States 2000 Presidential Election between George W. Bush (Republican) and Albert "Al" Gore (Democrat) will be best remembered for the controversy over who won Florida's 25 electoral votes, and ultimately, who won the presidency.

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The board of directors has four members; a president, a vice-president, a secretary, and a treasurer. Each member has a single yes/no vote. For a decision to pass, a majority of the board members must vote yes. In the event of a tie, the president’s vote is used to break the tie (i.e., if the president votes yes, the decision passes. If the president votes no, the decision fails.).

In this project, you will use only AND, OR & Inverter logic gates, frequently referred to as AOI logic, to design, simulate, and build a Majority Vote voting machine that meets these design specifications.

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Tania Sanchez

W.T.White

Methods

  1. Create a truth table
  2. Using the truth table, write the un-simplified logic expression for the output function
  3. Design an AOI logic circuit that implements the un-simplified logic expression
  4. Using the CDS, enter and test your un-simplified Majority Vote – Voting Machine. Use switches for the inputs P, V, S, & T and a probe or LED circuit for the output Decision.
  5. Using the theorems and laws of Boolean algebra, simplify the logic expression
  6. Design an AOI logic circuit that implements the simplified logic expression Decision
  7. Using the CDS, enter and test your simplified Majority Vote – Voting Machine.
  8. Using the DLB, build and test the simplified Majority Vote

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Discussion

Some difficulties in working on the project was just knowing what gates to use. Also reinsuring they were all connected to the correct input. Other difficulties presented was finding a breadboard that worked and making sure all the wires were put in the the correct spot.

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P V S T D

D=P’VST+PV’S’T+PV’ST’+PV’ST’+PVS’T’+PVS’T+PVST’+PVST

D=PV+PT+PS+VST

Majority Vote

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Activity 2.1.3 AOI Logic Implementation

Would you pay $199 for a written specification for an MP3 player? Would you pay $299 for the schematics for a cell phone? Of course not. You don’t pay for the specifications or the schematics; you pay for the product itself.

Introduction

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A B C F1

Methods

  1. Draw an AOI circuit that implements the logic expression F1.
  2. Re-implement the circuit assuming that only 2-input AND gates (74LS08), 2-input OR gates (74LS32), and inverters (74LS04) are available.
  3. Enter and test the logic circuit that you designed. Use switches for the inputs A, B, & C and a probe or LED circuit for the output F1.
  4. Build and test the logic circuit that you designed and simulate
  5. Draw an AOI circuit that implements the logic expression F2. For this implementation you may assume that AND & OR gates are available with any number of inputs.
  6. Re-implement the circuit assuming that only 2-input AND gates (74LS08), 2-input OR gates (74LS32), and inverters (74LS04) are available
  7. Use switches for the inputs A, B, & C and a probe or LED circuit for the output F2. Verify that the circuit is working as expected

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Discussion

F1=AC’+A’C+AB’C

Some difficulties presented on the activity was drawing the AOI circuit right. Also re-implementing the circuit using a specific amount of gates.

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Activity 2.2.2 Universal Gates:

NAND Only Logic Design

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The block diagram shown below represents a voting booth monitoring system. For privacy reasons, a voting booth can only be used if the booth on either side is unoccupied. The monitoring system has four inputs and two outputs. Whenever a voting booth is occupied, the corresponding input (A, B, C, & D) is a (1). The first output, Booth, is a (1) whenever a voting booth is available. The second output, Alarm, is a (1) whenever the privacy rule is violated.

  1. In the space provided, draw the AOI circuits that implement the simplified logic expressions Booth and Alarm. Limit this implementation to only 2-input AND gates (74LS08), 2-input OR gates (74LS32), and inverters (74LS04).
  2. Re-implement these circuits assuming that only 2-input NAND gates (74LS00) are available. Draw these circuits in the space provided.
  3. Using the CDS, enter and test the two logic circuits that you designed. Use switches for the inputs A, B, C, and D and a probe or LED circuit for the outputs Booth and Alarm. Verify that the circuits are working as expected. Print a copy of the circuit and attach it below. Note: Even though the two circuits work independently, they are part of one design and should be simulated, tested, and prototyped together.
  4. Using the DLB, build and test the NAND logic circuits that you designed and simulated. Verify that the circuits are working as expected and the results match the results of the simulation.

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Introduction

Methods

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Unsimplified

Simplified

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Activity 2.2.3 Universal Gates:

NOR Only Logic Design

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In this activity you will revisit the voting booth monitoring system introduced in Activity 2.2.2 NAND Logic Design. Specifically, you will be implementing the NOR only combinational logic circuits for the two outputs Booth and Alarm. In terms of efficiency and gate/IC utilization, these NOR only designs will be compared with the previously designed AOI and NAND implementations.

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Introduction

  1. In the space provided, re-draw the AOI circuits that you designed in Activity 2.2.2 NAND Logic Design.

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  • Re-implement these circuits assuming that only 2-input NOR gates (74LS02)

are available. Draw these circuits in the space provided.

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  • Using the CDS, enter and test the two logic circuits that you designed. Use switches for the inputs A, B, C, and D and a probe or LED circuit for the outputs Booth and Alarm. Verify that the circuits are working as expected. Print a copy of the circuit and attach it below. Note: Even though the two circuits work independently, they are part of one design and should be simulated, tested, and prototyped together.

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  • Using the DLB, build and test the NOR logic circuits that you designed and simulated. Verify that the circuits are working as expected and that the results match the results of the simulation.

Methods

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Activity 1.1.5

Circuit Theory

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Have you ever used a calculator to add some numbers, looked at the answer, and realized that it was wrong? How did you know that the answer was incorrect? The calculator gave you an answer; why did you not trust it? You knew the answer was wrong because you understand the fundamentals of mathematics. Your instinct told you that the answer could not be correct.

The same is true for circuit analysis. Throughout this course you will be using Circuit Design Software (CDS) to test the circuits that you design. This software will always give an answer, whether it is right or wrong. The only way that you will be able to rely on these answers is if you have an understanding of the laws of circuit analysis. You must develop the same instinct for circuit behavior that you have for mathematics.

In this activity you will gain experience applying Ohm’s Law and Kirchhoff’s Voltage and Current Laws to solve simple series and parallel circuits.

Introduction

  1. use Ohm’s Law to calculate the unknown quantity.
  2. calculate the value for RT
  3. Using the laws of circuit theory, solve for RT, IT, VR1, VR2, & VR3.
  4. Using the laws of circuit theory, solve for RT, IT, VR1, VR2, VR3, & VR4.
  5. Using the laws of circuit theory, solve for RT, IT, IR1, IR2, & IR3
  6. Using the laws of circuit theory, solve for RT, IT, IR1, IR2, IR3, & IR4

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Methods

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Project 2.2.5 Universal Gates and K-Mapping: Fireplace Control Circuit

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The Acme Fireplace Company has hired you to redesign the fireplace control circuit for their latest residential gas fireplace. The fireplace burner is equipped with four thermal sensors that output a logic (1) whenever a flame is present. These sensors are connected to the fireplace control circuit which outputs a (1) to the emergency cut-off valve to keep the gas flowing (i.e., a zero will turn the gas off).

The original design of the fireplace control circuit was quite simple. For the gas valve to remain on, all four sensors needed to output a logic (1). During field testing it was discovered that variations in gas pressure and humidity cause the thermal sensors to occasionally output a logic (0) even when a flame was present. This caused frequent unnecessary shut downs and constant customer dissatisfaction.

For the redesign, it has been determined that the emergency cut-off value should remain open as long as three of the four sensors indicate that a flame is present.

Additionally, the designers have asked you to add a second output indicator to the control circuit. This indicator will output a logic (1) when the four sensors do not all agree (i.e., not all on or not all off). This indicator will be used by the service technician to diagnose whether a faulty sensor exists.

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Introduction

Design

Design a combinational logic circuit that meets the above detailed design specifications.

Additionally:

· The Karnaugh mapping technique must be used to obtain the simplified logic expression for both outputs.

· The circuit that controls the emergency cut-off valve must be implemented using only 74LS00 two-input NAND gates.

· The circuit for the possible faulty sensor indicator must be implemented using only 74LS02 two-input NOR gates.

Simulation

Using the Circuit Design Software (CDS), enter and test your Fireplace Control Circuit design.Verify that the circuit is working as designed. If it is not, review your design work and circuit implementation to identify your mistake.

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Procedure

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Activity 2.1.6

Aerospace 3rd 2017

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Airfoil Simulation

Airfoils have a complex geometry designed to direct airflow. This velocity change results in forces that affect aircraft performances. This can be simulated using a computer to provide an estimate of expected performance.