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SyncESMC�

ITU-T G.781 Multi-Clock ESMC Implementation

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Introduction

SyncMonk is an early stage bootstrapped startup founded in 2020. We are based in Bangalore, India with main focus on time synchronization services and products. SyncMonk provides complete integration services to Telecom, Networking and Semiconductor companies.
SyncMonk believes in innovating things and is working on the Time Services portfolio including software and hardware solutions.
Solutions offered by SyncMonk are:

SyncESMC v1.0 an ESMC implementation based on ITU-T standard,
FishEye - Set your Vision Clock Monitoring tool for sync and time services
SyncPTP ptp stack optimized and in compliance with IEEE 1588-2019 standard and respective profiles.

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Agenda

Overview
Why SyncESMC
Architecture

Design GOALS
Configuration
Packet Engine
ESMC State Machine
Hardware Abstraction Layer (HAL)

External Interface
FishEye
Demo Video

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Overview

ESMC is a Logical Channel which transmits SSM information.
The SSM information determines the Quality level of EEC.
It is based on ITU-T G.8264 (03/2018) and ITU-T G.781 (04/2020)
Ethernet SSM is ITU-T-defined Ethernet Slow Protocol.

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Synchronization Network Topology

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Why SyncESMC

Hardware Abstracted ESMC stack.
Compliant to G.781(04/2020) and G.8264 (03/2018).
Simplified Single Threaded architecture.
Interaction with PTP Stack (to support IWF)
Dynamic configuration support.
Monitoring with FishEye
Supporting Intel® E810XXVDA4T, Renesas® ClockMatrix™ 8A34001 and AuraSemi® 5508 PHC.

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Architecture

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Design GOALS

Single Threaded architecture.
Multiple hardware support using HAL
Multi Clock Support
External MUX for Input Signals
Futuristic design to support kernel driver support with minimal changes.
Interaction with multi-vendor PTP stacks.
In-built Support for Network configuration and Monitoring
Micro Service compatible for SONiC

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Configuration

Configuration Module has two modes:

Static Configuration Mode

JSON-based configuration file.
System boots up with the predefined configuration
Configuration is majorly classified into

Device
Port
Monitoring

Dynamic Configuration

REST API
Netconf-yang model for O-RAN

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Packet Engine

Packet Engine is involved with the interface-related activity.

Packet RX
Packet TX
Port Link up/ Link down Events (Network Link)
Packet filtering

Different types of Sockets and interface types are

Separated using packet engine library.

Raw Socket
UDS Socket
APIs

Packet Filter

RX

TX

Application

RTNL

Link

Events

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ESMC State Machine

Core of the ESMC stack.
Interacts with the Packet Engine, Configuration Engine, HAL
Decides to select the source port based on the Best Port Selection Algorithm. (Quality, Priority, Hops)
Handles the timer interrupts for Time outs for Hold off time, no activity on the port, Holdover timeout and Restore timers.
Interacts with HAL to configure the Hardware.

ESMC

State Machine

Packet Engine

Configuration

Timer

HAL

1

2

3

4

5

Packet Engine updates the packet metadata to Database.
Configuration can be updated run time
Timer-based events for TX packets, Holdover events, and RX timeout events.
Hardware events like LOS, OOF, PLL Loss
PLL ID and PLL input selection instructions to HAL.

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External MUX for Input Signals

Supports Multiplexing, where it can be configured for the maximum number of Sources available for a PLL and the maximum number of inputs which can be given to the PLL.
Runs an algorithm to select the best ports and based on priority programs the MUX.
Works with any of the available hardware where the number of inputs to PLL is more than the number of sources available. For e.g Broadcom XGS chips for Data Center switches

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PLL

MUX

Source

Inputs

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Hardware Abstraction Layer

Hardware Abstraction Layer.
Hardware vendors can plugin their HAL functions to integrate with SyncESMC.
Ready for Kernel exposed APIs (in future) for controlling the hardware.
Hardware interrupt and status monitoring.
Multiple vendors’ PLLs can be controlled by the same stack.

HAL

(Hardware Abstraction Layer)

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External Interface

UDS socket can be used to interact with external applications

PTP stack

Seamless integration with any PTP stack over a UDS socket.
SyncESMC can convert Clock Class to Clock quality as per G.8275.2 Annex F.

External Application Interfaces

FishEye
Configurations

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SyncESMC

UDS

PTP

Exchange information on Application-defined TLVs

I/F

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Analyze, Optimize and Monetize your Network

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Clock Network Graph

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Clock Network Summary

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Clock Performance

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Port Performance

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Clock Details

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	Contact Us Phone [+91] 984-441-9796 mail: info@syncmonk.net www.syncmonk.net Bangalore-560035	© 2023 SyncMonk Technologies Product specification and description in this document are subject to change without notice. For latest copy please write us to info@syncmonk.net

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