CPE 408330� Assembly Language and�Microprocessors��Chapter 5: 8088/8086 Microprocessor �Programming – Integer Instructions �and Computations������
[Computer Engineering Department,
Hashemite University, © 2008]
Lecture Outline
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5.1 Data-Transfer Instructions
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5.1 Data-Transfer Instructions – Move Instruction
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• Used to move (copy) data between:
• Registers
• Register and memory
• Immediate operand to a register or memory
• General format:
MOV D,S
• Operation: Copies the content of the source to the destination
(S) 🡪 (D)
• Source contents unchanged
• Flags unaffected
• Allowed operands
Register
Memory
Accumulator (AH,AL,AX)
Immediate operand (Source only)
Segment register (Seg-reg)
• Examples:
MOV [SUM],AX
(AL) 🡪 (address SUM)
(AH) 🡪 (address SUM+1)
Allowed operands for MOV instruction
5.1 Data-Transfer Instructions – Move Instruction
e.g. MOV DX, CS
MOV [SUM], AX
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5.1 Data-Transfer Instructions – Move Instruction
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MOV DX, CS
Before execution
Source = CS 🡪 word data
Destination = DX 🡪 word data
Operation: (CS) 🡪 (DX)
• State before fetch and execution
CS:IP = 0100:0100 = 01100H
Move instruction code = 8CCAH
(01100H) = 8CH
(01101H) = CAH
(CS) = 0100H
(DX) = XXXX 🡪 don’t care state
5.1 Data-Transfer Instructions – Move Instruction
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MOV DX, CS
After execution
• State after execution
CS:IP = 0100:0102 = 01102H
01002H 🡪 points to next
sequential instruction
(CS) = 0100H
(DX) = 0100H 🡪 Value in CS
copied into DX
Value in CS unchanged
5.1 Data-Transfer Instructions – Move Instruction
What is the effect of executing the instruction
MOV CX, [SOURCE_MEM]
Where SOURCE_MEM equal to 2016 is a memory location offset relative to the current data segment starting at 1A0016.
((DS)0+2016) → (CL)
((DS)0+2016+116) → (CH)
Therefore CL is loaded with the contents held at memory address
1A00016 + 2016 = 1A02016
and CH is loaded with the contents of memory address
1A00016 + 2016 +116 = 1A02116
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5.1 Data-Transfer Instructions – Move Instruction
Use the DEBUG to verify
MOV CX,[20]
DS = 1A00 (DS:20) = AA55H
(1A00:20) 🡪 (CX)
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5.1 Data-Transfer Instructions – Move Instruction
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• Example—Initialization of internal registers with immediate data and address information
• DS, ES, and SS registers initialized from immediate data via AX
IMM16 🡪 (AX)
(AX) 🡪 (DS) & (ES) = 2000H
IMM16 🡪 (AX)
(AX) 🡪 (SS) = 3000H
• Data registers initialized
IMM16 🡪 (AX) =0000H
(AX) 🡪 (BX) =0000H
IMM16 🡪 (CX) = 000AH and (DX) =
0100H
• Index register initialized from immediate operations
IMM16 🡪 (SI) = 0200H and (DI) = 0300H
DS,ES to 2000H
SS to 3000H
AX, BX to 0H
CX to 0A
SI to 200
DI to 300
5.1 Data-Transfer Instructions - Exchange Instruction
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• Used to exchange the data between two data registers or a data register and memory
• General format:
XCHG D,S
• Operation: Swaps the content of the
source and destination
• Both source and destination change
(S) 🡪 (D)
(D) 🡪 (S)
• Flags unaffected
• Special accumulator destination version executes faster
• Examples:
XCHG AX,DX
(Original value in AX) 🡪 (DX)
(Original value in DX) 🡪 (AX)
Allowed operands for XCHG instruction
5.1 Data-Transfer Instructions - Exchange Instruction
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XCHG [SUM],BX
Note: SUM = 1234
Before execution
Source = BX 🡪 word data
Destination = memory offset
SUM 🡪 word data
Operation: (SUM) 🡪 (BX)
(BX) 🡪 (SUM)
What is the general logical address
of the destination operand?
• State before fetch and execution
CS:IP = 1100:0101 = 11101H
Move instruction code = 871E3412H
(01104H,01103H) = 1234H = SUM
(DS) = 1200H
(BX) = 11AA
(DS:SUM) = (1200:1234) = 00FFH
5.1 Data-Transfer Instructions - Exchange Instruction
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XCHG [SUM],BX
After execution
• State after execution
CS:IP = 1100:0105 = 11105H
11005H 🡪 points to next sequential instruction
• Register updated
(BX) = 00FFH
• Memory updated
(1200:1234) = AAH
(1200:1235) = 11H
5.1 Data-Transfer Instructions - Exchange Instruction
Use the DEBUG to verify the previous example.
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5.1 Data-Transfer Instructions - Exchange Instruction
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5.1 Data-Transfer Instructions – Translate Instruction
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• Translate instruction
• Used to look up a byte-wide value in a table in memory and copy that
value in the AL register
• General format:
XLAT
• Operation: Copies the content of the element pointed to in the source
table in memory to the AL register
((AL)+(BX) +(DS)0) 🡪 (AL)
Where:
(DS)0 = Points to the active data segment
(BX) = Offset to the first element in the table
(AL) = Displacement to the element of the table that is to be accessed*
*8-bit value limits table size to 256 elements
5.1 Data-Transfer Instructions – Translate Instruction
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• Application: ASCII to EBCDIC Translation
• Fixed EBCDIC table coded into
memory starting at offset in BX
• Individual EBCDIC codes placed in
table at displacement (AL) equal to the
value of their equivalent ASCII character
• A = 41H in ASCII, A = C1H in EBCDIC
• Place the value C1H in memory at
address (A1H+(BX) +(DS)0), etc.
• Example
XLAT
(DS) = 0300H
(BX) = 0100H
(AL) = 3FH 🡪 6FH = ? (Question mark)
5.1 Data-Transfer Instructions – Load Effective Address and Load Full Pointer�Instructions
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• Load effective address instruction
• Used to load an address pointer offset from memory into a register.
• General format:
LEA Reg16,EA
• Operation:
(EA) 🡪 (Reg16)
• Source unaffected:
• Flags unaffected
5.1 Data-Transfer Instructions – Load Effective Address and Load Full Pointer�Instructions
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• Load full pointer
• Used to load a full address pointer from memory into a segment register and a register
• Segment base address
• Offset
• General format and operation for LDS
LDS Reg16,EA
(EA) 🡪 (Reg16)
(EA+2) 🡪 (DS)
• LES operates the same, except initializes ES
5.1 Data-Transfer Instructions – Load Effective Address and Load Full Pointer�Instructions
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• Example
LDS SI,[200H]
Source = pointer to DS:200H🡪 32 bits
Destination = SI 🡪 word pointer offset
DS 🡪 word pointer SBA
Operation: (DS:200H) 🡪 (SI)
(DS:202H) 🡪 (DS)
• State before fetch and execution
CS:IP = 1100:0100 = 11100H
LDS instruction code = C5360002H
(11102H,11103H) = (EA) = 0200H
(DS) = 1200H
(SI) = XXXX 🡪 don’t care state
(DS:EA) = 12200H = 0020H = Offset
(DS:EA+2) = 12202H = 1300H = SBA
Before execution
5.1 Data-Transfer Instructions – Load Effective Address and Load Full Pointer�Instructions
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• Example
• State after execution
CS:IP = 1100:0104 = 11104H
01004H 🡪 points to next sequential instruction
(DS) = 1300H 🡪 defines a new data segment
(SI) = 0020H 🡪 defines new offset into DS
After execution
5.1 Data-Transfer Instructions – Load Effective Address and Load Full Pointer�Instructions
Verify the following instruction using DEBUG program.
LDS SI, [200H]
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5.1 Data-Transfer Instructions – Load Effective Address and Load Full Pointer�Instructions
Initializing the internal registers of the 8088 from a table in memory.
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MOV AX, [INIT_TABLE]
MOV SS, AX
LDS SI, [INIT_TABLE+02H]
LES DI, [INIT_TABLE+06H]
MOV AX, [INIT_TABLE+0AH]
MOV BX, [INIT_TABLE+0CH]
MOV CX, [INIT_TABLE+0EH]
MOV DX, [INIT_TABLE+10H]
• DS loaded via AX with immediate value using move instructions
DATA_SEG_ADDR 🡪 (AX) 🡪 (DS)
• Index register SI loaded with move from table
(INIT_TABLE,INIT_TABLE+1) 🡪 SI
• DI and ES are loaded with load full pointer instruction
(INIT_TABLE+2,INIT_TABLE+3) 🡪 DI
(INIT_TABLE+4,INIT_TABLE+5) 🡪 ES
• SS loaded from table via AX using move instructions
(INIT_TABLE+6,INIT_TABLE+7) 🡪 AX 🡪 (SS)
• Data registers loaded from table with move instructions
(INIT_TABLE+8,INIT_TABLE+9) 🡪 AX
(INIT_TABLE+A,INIT_TABLE+B) 🡪 BX
(INIT_TABLE+C,INIT_TABLE+D) 🡪 CX
(INIT_TABLE+E,INIT_TABLE+F) 🡪 DX
LES DI,[INIT_TABLE+2]
5.2 Arithmetic Instructions
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5.2 Arithmetic Instructions - Addition�Instructions
ADD D,S
(S) +(D) 🡪 (D)
ADD AX,BX
(AX) + (BX) 🡪 (AX)
ADD [DI],AX
(DS:DI) + (AX) 🡪 (DS:DI)
ADD AX,100H
(AX) + IMM16 🡪 (AX)
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(a) Addition Instructions. (b) Allowed operands for ADD and ADC (c) Allowed operands for INC
5.2 Arithmetic Instructions - Addition�Instructions
Assume that the AX and BX registers contain 110016 and 0ABC16, respectively. What is the result of executing the instruction ADD AX, BX?
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(BX)+(AX) = 0ABC16 + 110016=1BBC16
The sum ends up in destination register AX. That is
(AX) = 1BBC16
CF = 0
5.2 Arithmetic Instructions - Addition�Instructions
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• State before fetch and execution
CS:IP = 1100:0100 = 11100H
ADD machine code = 03C3H
(AX) = 1100H
(BX) = 0ABCH
(DS) = 1200H
(1200:0000) = 12000H = XXXX
Before execution
5.2 Arithmetic Instructions - Addition�Instructions
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• State after execution
CS:IP = 1100:0102 = 11102H
11102H 🡪 points to next sequential instruction
• Operation performed
(AX) + (BX) 🡪 (AX)
(1100H) + (0ABCH) 🡪 1BBCH
(AX) = 1BBCH
= 00011011101111002
(BX) = unchanged
• Impact on flags
• CF = 0 (no carry resulted)
• ZF = 0 (not zero)
• SF = 0 (positive)
• PF = 0 (odd parity)—parity flag is only based on the bits of the least significant byte
After execution
5.2 Arithmetic Instructions - Addition�Instructions
Verify the previous example using DEBUG program. Solution:
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5.2 Arithmetic Instructions - Addition�Instructions
The original contents of AX, BL, word-size memory location SUM, and carry flag (CF) are 123416, AB16, 00CD16, and 016, respectively. Describe the results of executing the following sequence of instruction?
ADD AX, [SUM]
ADC BL, 05H
INC WORD PTR [SUM]
(AX)←(AX)+(SUM) = 123416 + 00CD16 =130116
(BL)←(BL)+imm8+(CF) = AB16 + 516+016 = B016
(SUM)←(SUM)+ 116 = 00CD16 + 116 = 00CE16
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5.2 Arithmetic Instructions - Addition�Instructions
What is the result of executing the following instruction
sequence?
ADD AL, BL
AAA
Assuming that AL contains 3216 (ASCII code for 2) and BL contains 3416 (ASCII code 4), and that AH has been cleared.
(AL)←(AL)+(BL)= 3216 + 3416=6616
The result after the AAA instruction is
(AL) = 0616
(AH) = 0016
with both AF and CF remain cleared
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Important: Any adjustment operation will be performed on AL therefore the result must be always placed in AL before executing the adjustment operation
5.2 Arithmetic Instructions - Addition�Instructions
Perform a 32-bit binary add operation on the contents of the processor’s register.
(DX,CX) ← (DX,CX)+(BX,AX)
(DX,CX) = FEDCBA9816
(BX,AX) = 0123456716
MOV DX, 0FEDCH
MOV CX, 0BA98H
MOV BX, 01234H
MOV AX, 04567H
ADD CX, AX
ADC DX, BX ; Add with carry
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5.2 Arithmetic Instructions – Subtraction Instructions
• SUB 🡪 Subtract
• SBB 🡪 Subtract with borrow
• DEC 🡪 Decrement
• NEG 🡪 Negative
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(a) Subtraction Instructions. (b) Allowed operands for SUB and SBB (c) Allowed operands for DEC (d) Allowed operands for NEG
5.2 Arithmetic Instructions – Subtraction Instructions
SUB D,S
(D) - (S) 🡪 (D)
SUB AX,BX
(AX) - (BX) 🡪 (AX)
SUB [DI],AX
(DS:DI) - (AX) 🡪 (DS:DI)
SUB AX,100H
(AX) - IMM16 🡪 (AX)
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(a) Subtraction Instructions. (b) Allowed operands for SUB and SBB (c) Allowed operands for DEC (d) Allowed operands for NEG
5.2 Arithmetic Instructions – Subtraction Instructions
SBB D,S
(D) - (S) - (CF) 🡪 (D)
SBB AX,BX
SBB BX,CX
(BX) = 1234H
(CX) = 0123H
(CF) = 0
(BX) - (CX) - (CF) 🡪 (BX)
1234H - 0123H - 0H = 1111H
(BX) = 1111H
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5.2 Arithmetic Instructions – Subtraction Instructions
NEG D
(0) - (D) 🡪 (D)
(1) 🡪 (CF)
NEG BX
(BX) =003AH
(0) - (BX) 🡪 (BX)
0000H – 003AH=
0000H + FFC6H (2’s complement) = FFC6H
(BX) =FFC6H ; CF =1
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5.2 Arithmetic Instructions – Subtraction Instructions
DEC D
(D) - 1 🡪 (D)
DEC SI
(SI) = 0FFFH
(SI) - 1 🡪 SI
0FFFH - 1 = 0FFEH
(SI) = 0FFEH
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5.2 Arithmetic Instructions – Subtraction Instructions
Perform a 32-bit binary subtraction for variable X and Y.
MOV SI, 200H ; Initialize pointer for X
MOV DI, 100H ; Initialize pointer for Y
MOV AX, [SI] ; Subtract LS words
SUB AX, [DI]
MOV [SI],AX ; Save the LS word of result
MOV AX, [SI]+2 ; Subtract MS words
SBB AX, [DI]+2
MOV [SI]+2, AX ; Save the MS word of result
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5.2 Arithmetic Instructions – Multiplication Instructions
(AL) X (S8)🡪 (AX) 8-bit
product gives 16 bit result
(AX) X (S16) 🡪 (DX), (AX)
16- bit product gives 32 bit result
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(a) Multiplication and Division Instructions. (b) Allowed operands
5.2 Arithmetic Instructions – Multiplication Instructions
The 2’s-complement signed data contents of AL are –1 and that of CL are –2. What result is produced in AX by executing the following instruction?
MUL CL and IMUL CL
(AL) = -1 (as 2’s complement) = 111111112 = FF16
(CL) = -2 (as 2’s complement) = 111111102 = FE16
Executing the MUL instruction gives
(AX) = 111111112x111111102=11111101000000102=FD0216
Executing the IMUL instruction gives
(AX) = -116 x -216 = 216 = 000216
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If the operation is MUL CX 🡺 multiply CX by AX and store the higher order word of the result in DX and the low order word of the result in AX
5.2 Arithmetic Instructions – Multiplication Instructions
1- The multiplication may take one of two forms
2- To perform unsigned multiplication convert the two numbers into binary and perform the multiplication.
3- To perform signed multiplication
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5.2 Arithmetic Instructions – Multiplication Instructions
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Verify the previous example using DEBUG program. Solution:
5.2 Arithmetic Instructions – Division Instructions
(AX) / (S8) 🡪 (AL) =quotient
(AH) = remainder
(DX,AX) / (S16) 🡪 (AX) =quotient
(DX) = remainder
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(a) Multiplication and Division Instructions. (b) Allowed operands
5.2 Arithmetic Instructions – Convert Instructions
(MSB of AL) 🡪 (all bits of AH)
(MSB of AX) 🡪 (all bits of DX)
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1- The division may take one of two forms
2- The way in which you perform either a singed or unsigned division is similar to the mechanism used in the multiplication instruction
3- The sign for the remainder is always similar to the sign of the dividend ex. -26 / 8 🡺 Quotient=-3 and Remainder = -2
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5.2 Arithmetic Instructions – Convert Instructions
What is the result of executing the following instructions?
MOV AL, 0A1H
CBW
CWD
(AL) = A116 = 101000012
Executing the CBW instruction extends the MSB of AL
(AH) = 111111112 = FF16 or (AX) = 11111111101000012
Executing CWD instruction, we get
(DX) = 11111111111111112 = FFFF16
That is,
(AX) = FFA116 (DX) = FFFF16
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5.3 Logic Instructions
AND D,S
(S) AND (D) 🡪 (D)
AND AX,BX
(AX) AND (BX) 🡪 (AX)
AND [DI],AX
(DS:DI) AND (AX) 🡪 (DS:DI)
AND AX,100H
(AX) AND IMM16 (AX)
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(a) Logic Instructions. (b) Allowed operands for AND, OR, and XOR (c) Allowed operands for NOT
5.3 Logic Instructions
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Describe the results of executing the following instructions?
MOV AL, 01010101B
AND AL, 00011111B
OR AL, 11000000B
XOR AL, 00001111B
NOT AL
(AL)=010101012 ⋅ 000111112= 000101012=1516
Executing the OR instruction, we get
(AL)= 000101012 +110000002= 110101012=D516
Executing the XOR instruction, we get
(AL)= 110101012 ⊕ 000011112= 110110102=DA16
Executing the NOT instruction, we get
(AL)= (NOT)110110102 = 001001012=2516
5.3 Logic Instructions
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Verify the previous example using DEBUG program.
5.3 Logic Instructions - Mask Application
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• Mask—to clear a bit or bits of a byte or word to 0
• AND operation can be used to perform the mask operation
• 1 AND 0 🡪 0; 0 and 0 🡪 0
• A bit or bits are masked by ANDing with 0
• 1 AND 1 🡪 1; 0 AND 1 🡪 0
• ANDing a bit or bits with 1 results in no change
• Example: Masking the upper 12 bits of a value in a register
AND AX,000FH
(AX) =FFFF
IMM16 AND (AX) 🡪 (AX)
000FH AND FFFFH = 00000000000011112 AND 11111111111111112
= 00000000000011112
= 000FH
5.3 Logic Instructions - Mask Application
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• OR operation can be used to set a bit or bits of a byte or word to 1
• X OR 0 🡪 X; result is unchanged
• X or 1 🡪 1; result is always 1
• Example: Setting a control flag in a byte memory location to 1
MOV AL,[CONTROL_FLAGS]
OR AL, 10H ; 00010000 sets fifth bit –b4
MOV [CONTROL_FLAGS],AL
(AL) = XXXXXXXX2 OR 000100002 = XXX1XXXX2
Setting
5.4 Shift Instructions
1= one bit shift
CL = 1 to 255 bit shift
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(a) Shift Instructions. (b) Allowed operands
Every shift operation is equivalent to :
* multiplication by 2 for Shift left
* dividing by 2 for Logical Shift right
5.4 Shift Instructions - Operation of the SAL/SHL Instruction
SHL AX,1
Dest = (AX) = 1234H
= 00010010001101002
Count = 1
CF = X
Dest = (AX) = 2468H
= 00100100011010002
CF = 0
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5.4 Shift Instructions - Operation of the SHR Instruction
SHR AX,CL
Dest = (AX) = 1234H = 466010
= 00010010001101002
Count = (CL) = 02H
CF = X
Dest = (AX) = 048DH = 116510
= 00000100100011012
CF = 0
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5.4 Shift Instructions - Operation of the SAR Instruction
SAR AX,CL
Dest = (AX) = 091AH
= 00001001000110102 = +2330
Count = CL = 02H
CF = X
Dest = (AX) = 0246H
= 00000010010001102 = +582
CF = 1
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5.4 Shift Instructions - Operation of the SAR Instruction
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Assume that CL contains 0216 and AX contains 091A16. Determine the new contents of AX and the carry flag after the instruction SAR AX, CL is executed.
Initial (AX)=00001001000110102
shift AX right twice: (AX)=00000010010001102=024616
and the carry flag is (CF)=12
5.4 Shift Instructions - Operation of the SAR Instruction
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Verify the previous example using DEBUG program.
(AX)=00000010010001102=024616
and the carry flag is (CF)=12
5.4 Shift Instructions - Operation of the SAR Instruction
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Isolate the bit B3 of the byte at the offset address CONTROL_FLAGS.
MOV AL, [CONTROL_FLAGS]
MOV CL, 04H
SHR AL, CL
Executing the instructions, we get
(AL)=0000B7B6B5B4
and
(CF)=B3
5.5 Rotate Instructions
1= one bit rotate
CL = 1 to 255 bit rotate
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(a) Rotate Instructions. (b) Allowed operands
5.5 Rotate Instructions - Operation of the ROL Instruction
ROL AX,1
Dest = (AX) = 1234H
= 0001 0010 0011 01002
Count = 1
CF = 0
Dest = (AX) = 2468H
= 0010 0100 0110 10002
CF = 0
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5.5 Rotate Instructions - Operation of the ROR Instruction
ROR AX,CL
Dest = (AX) = 1234H
= 00010010001101002
Count = 04H
CF = 0
Dest = (AX) = 4123H
= 01000001001000112
CF = 0
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5.5 Rotate Instructions - Operation of the RCL Instruction
RCL BX,CL
Dest = (BX) = 1234H
= 00010010001101002
Count = (CL) = 04H
CF = 0
Dest = (BX) = 2340H
= 00100011010000002
CF = 1
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5.5 Rotate Instructions - Operation of the RCR Instruction
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What is the result in BX and CF after execution of the following
instructions?
RCR BX, CL
Assume that, prior to execution of the instruction, (CL)=0416,
(BX)=123416, and (CF)=0
The original contents of BX are
(BX) = 00010010001101002 = 123416
Execution of the RCR command causes a 4-bit rotate right through carry to take place on the data in BX, the results are
(BX) = 10000001001000112 = 812316
(CF) = 02
5.5 Rotate Instructions - Operation of the RCR Instruction
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S. Abed - HU, Jordan
Verify the previous example using DEBUG program.
5.5 Rotate Instructions
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CPE 0408330 @ 2008
S. Abed - HU, Jordan
Disassembly and addition of 2 hexadecimal digits stored as a
byte in memory.
1st Instruction 🡪 Loads AL with byte
containing two hex digits
2nd Instruction 🡪 Copies byte to BL
3rd Instruction 🡪 Loads rotate count
4th instruction 🡪 Aligns upper hex digit of BL with lower digit in AL
5th Instruction 🡪 Masks off upper hex digit in AL
6th Instruction 🡪 Masks off upper four bits of BL
7th Instruction 🡪 Adds two hex digits
1, 10, 26, 38, 47
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CPE 0408330 @ 2008
S. Abed - HU, Jordan
H.W. #5