Summery Before Mid-Semester Exam

Dr A Sahu

Dept of Comp Sc & Engg.

IIT Guwahati

Outline

• 8085 & 8086 Architectures
• Peripheral Devices
• Display, Keyboard, Data Converter
• Combined Peripheral controller + timer (8155)
• Peripheral Controller
• Peripheral Controller (8255)
• Interrupt Controller (8259)
• DMA Controller (8237)
• Serial Communication controller (8251A)
• Programmable Interval Timer (8254)

Mid Semester Exam

• One page Data sheet of All Controller will be provided
• Architecture, Control word, Status word, Mode
• 8155 iot, 8255ioc, 8259pic, 8237dma, 8251usart, 8254pit
• 5 questions (Order may be different)
• 2 Theory and Concepts
• (40 % Easy)
• 2 Design question
• (40 % can be done easily if u have attend the class)
• 1 Thinking question
• (20% ; relatively top level)
• Timing & Venue:
• 10.00AM-12.00Nn, 20 Sept 2010, 2202/2204

​

W

Z

B

C

D

E

H

L

SP

PC

Inc/Dec. ter

Add latch

MUX

Bus 8 Bit

Interrupt Control

Serial I/O Control

IR

I Decode

&

M/C

Encoding

tmp R

ACC

Timing and Control

ALU

Add Buff

Data/Add Buff

Flag

INTR

INTA

RST5.5

ReSeT6.5

RST7.5

TRAP

SID

SOD

8085 Microprocessor Architecture

8086 Architecture

Z (Flag Reg)

Temp A

Temp B

Temp C

Sequencer

Bus Interface Unit

Execution

Unit

SUM

C BUS

A BUS

ALU

8086 Registers

• AX - the accumulator register (divided into AH / AL)
• BX - the base address register (divided into BH / BL)
• CX - the count register (divided into CH / CL)
• DX - the data register (divided into DH / DL)

​

• SI - source index register.
• DI - destination index register.
• BP - base pointer.
• SP - stack pointer.

​

AH

AL

BH

BL

CH

CL

DH

DL

SI (Source Idx )

DI (Dest. Idx)

BP (Base Ptr )

SP (Stack Ptr)

CS (Code Seg Reg)

DS (Data Seg Reg )

ES (Extra Seg Reg )

SS (Stack Seg Reg)

IP (Intr Ptr)

Z (Flag Reg)

Memory layout of C program

int A;

int B=10;

main(){

int Alocal;

int *p;

p=(int*)malloc(10);

}

Data

Code

Heap

Stack

BSS

MASM : Hello world

.model small

.stack 100h ; reserve 256 bytes of stack space

.data

message db "Hello world, I'm learning Assembly$”

.code

main proc

mov ax, seg message ; ax<-data seg. start addr.

mov ds, ax ; Initialize Seg Reg

mov ah, 09 ; 9 in the AH reg indicates Procedure

;hould write a bit-string to the screen.

lea dx, message ;Load Eff Address

int 21h

mov ax,4c00h ; Halt for DOS routine (Exit Program)

int 21h

main endp

end main

GetChar, PutChar

• putchar( ‘a‘ ) ;

​

​

​

• c = getchar() ;

​

mov dl, ‘a‘ ;dl = ‘a‘

mov ah, 2h ;character output subprogram

int 21h ; call ms-dos output character

mov ah, 1h ; keyboard input subprogram

int 21h ; char input, char is stored in al

mov c, al ; copy character from al to c

Transmission controller

• Transmission Controller:
• MPU control, Device Control (DMA)
• Type of IO mapping
• Peripheral (IN/Out), Memory mapped IO (LD/ST,MV)
• Format of communication
• Synchronous (T & R sync with clock), Asynchronous
• Mode of Data Transfer
• Parallel, Serial (UART)
• Condition for data transfer
• Uncond., Polling, Interrupt, Ready signal, Handshake

​

D/A converter

• FullScaleOutput=(FullScaleValue – 1LSBValue)
• 1MSB Value=1/2 * FSV

Digital

to

Analog

Converter

D₀

D₁

D₂

Analog Output

V_o

Digital Inputs

Analog output

000

001

011

010

100

101

111

110

LSB

FS

0

1

2

3

4

5

6

7

Resolution, Reference Voltages, Settling Time, Linearity, Speed, Errors

​

A/D Conversion Techniques

• Counter or Tracking ADC
• Successive Approximation ADC
• Most Commonly Used
• Parallel or Flash ADC
• Fast Conversion

Display

7 Seg 9 Seg 16 Seg 3x5 DotMatix 5x7 9x11

Dot Matrix Display Panel

25x80 character monitor

Multiplexed line and Memory use

40 Bit data line

8 Bit data line

0

1

2

3

4

Mod 5 Counter

Multiplexed 25x80 Char Display

C

A

T

F

I

R

E

0 1 2 3 4 ….. 78 79

0

1

2

​

23

24

​

A

Decoder

Or

ROM

Memory

Decoded Bits

Row Ctr

Col

Ctr

CLK > 50Hzx25x80

Multiplexed 1024x768 pixel display

0 1 2 3 4 ….. …1023

0

1

2

​

​

767

​

R

Row Ctr

Col

Ctr

CLK > 1024x768x50Hz

B

G

8x3=24 Bits

Frame Buffer

Refresh screen 50 time a Sec

How Keyboard work ? ==1D

0

1

2

3

14

15

+5V

N to Lg(n) decoder

A

B

C

D

. . .

0 0 1 1

Simple keyboard with 64 keys

• Scan Row (6)
• Scan Column (3)
• Send this to Decoder to generate ASCII value or Scan code

6,3

Decode to

ACSII

​

(Memory

ROM)

To

Host

(CPU)

8155 IO/Timer

• D0, D1: mode for PA and PB, 0=IN, 1=OUT
• D2, D3: mode for PC
• D4, D5: interrupt EN for PA and PB, 0=disable 1=enable
• D6, D7: Timer command:
• 00: No effect
• 01: Stop if running else no effect
• 10: Stop after terminal count (TC) if running, else no effect
• 11: Start if not running, reload at TC if running.
• Port C bits (D2, D3)

• M2, M1: mode bits:
• 00: Single square wave of wavelength TC/2 (TC/2,TC/2 if TC even; [TC+1/2],[TC-1/2] if TC odd)
• 01: Square waves of wavelength TC (TC/2,TC/2 if TC even; [TC+1/2],[TC-1/2] if TC odd)
• 10: Single pulse on the TC'th clock pulse
• 11: Single pulse on every TC'th clock pulse.

​

​

8255 PPC

8259 PIC

8237 DMA

CMD

Mode

Req

Status

MASK

8251 USART

8254 PIT

• Mode 0 : Interrupt on Terminal count
• Mode 1 : Hardware Retriggerable One Shot
• Mode 2 : Rate Generator
• Mode 3 : Square wave generator
• Mode 4 : Software Triggered Strobe
• Mode 5 : Hardware Triggered Strobe

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Thanks

&

Good Luck for your Exam