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Front-End Chip�Configuration

March 28, 2025

Vakhtang Tsiskaridze

Tbilisi State University

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Description of Front-End Chip registers and fields are in YAML format.

Registers has three types:

  • read-write – regular register, used for config.
  • read-only – only for reading
  • write-only – reset like registers, used for config.

Sub-register – block of bits from the register [bitlo, bithi].

Fields may consist from several sub-registers.

Type of field is derived from type of registers in uses.�It is assumed, that all sub-registers are with the same type.

Auto-generation code generates various*.hpp or *.py files,�which are directly included in the code.

Chip Registers and Fields

Registers: |

PIX_PORTAL: |

desc: "Pixel portal" |

addr: 0 |

REGION_COL: |

desc: "Pixel column pair" |

addr: 1 |

. . . |

Fields: |

PIX_PORTAL: |

regs: |

- PIX_PORTAL: |

bithi: 15 |

bitlo: 0 |

defv: 0 |

REGION_COL: |

regs: |

- REGION_COL: |

bithi: 7 |

bitlo: 0 |

defv: 0 |

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Files are provided in https://gitlab.cern.ch/orion/interfaces/itk-def

itkpix1_cfglist.hpp – list of configurable registers

itkpix1_fldlist.hpp – full list of fields

itkpix1_fldlist_pymodel.py – pydantic model for fields

itkpix1_fldmap.hpp – C++ code to generate field_t structures

itkpix1_reglist.hpp – list of all registers

itkpix1_reglist_pymodel.py – pydantic model for registers (for DB)

itkpix1_regmap.hpp – C++ code to generate register_t structures

itkpix1_yarr_fldlist.hpp – YARR field list

itkpix1_yarr_fldlist_pymodel.py – pydantic model for YARR

itkpix1_yarr_fldmap.hpp – C++ code for YARR fields

Similar files are generated for each chip

Auto-Generated Files

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Registers and Fields are provided as structures:

static constexpr auto PIX_PORTAL = make_regrw( 0, "PIX_PORTAL", "Pixel portal"); |

static constexpr auto REGION_COL = make_regrw( 1, "REGION_COL", "Pixel column"); |

Fields

static constexpr auto EN_CORE_COL_RST = make_field("EN_CORE_COL_RST") |

.add(regmap::EnCoreColumnReset_3, 0, 6) |

.add(regmap::EnCoreColumnReset_2, 0, 16) |

.add(regmap::EnCoreColumnReset_1, 0, 16) |

.add(regmap::EnCoreColumnReset_0, 0, 16); |

Pydantic model:

class FldMem_(BaseModel) : |

PIX_PORTAL : int = fldbits(16) |

REGION_COL : int = fldbits(8) |

REGION_ROW : int = fldbits(9) |

PIX_BROADCAST : int = fldbits(1) |

class RegMem_(BaseModel) :

PIX_PORTAL : int = regbits()

REGION_COL : int = regbits()

REGION_ROW : int = regbits()

PIX_MODE : int = regbits()

Registers and Fields

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List of registers or fields are provided

#define ITKPIX1_REGCFG(f) \ |

f(PIX_PORTAL) \ |

f(REGION_COL) \ |

f(REGION_ROW) \ |

f(PIX_MODE) |

CHIP_REGMAP – list of all registers

CHIP_FLDMAP – list of all fields

CHIP_REGCFG – list of registers for chip config

Registers and Fields

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Based on provided header files, all other structures are generated in the project.

Front-End Chip structure

struct itkpix1 { |

using reg_t = uint16_t; |

static constexpr uint16_t RegNum = 255; |

struct regmap { |

// static constexpr auto PIX_PORTAL = make_regrw(0, "PIX_PORTAL", "Pixel portal"); |

#include "itkpix/itkpix1_regmap.hpp" |

}; // regmap |

struct fldmap { |

// static constexpr auto PIX_PORTAL = make_field("PIX_PORTAL") |

// .add(regmap::PIX_PORTAL, 0, 16); |

#include "itkpix/itkpix1_fldmap.hpp" |

}; // fldmap |

Register memory structure for ITkPix.v1 for ConfigDB

#define PROC_REGT(name) reg_t name; |

/// @brief Register memory for ITkPix.v1 chip |

struct regmem1_t : public regmem_t { |

// constexpr uint NumReg = 119; |

ITKPIX1_REGCFG(PROC_REGT) |

}; // regmem1_t |

Structures

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Common Chip class functionality:

Chip is templated to get register and field structures.

template<typename fechip> |

class Chip { |

public: |

Virtual functions to send write register and read register commands.

virtual void cmd_write_reg(uint16_t addr, reg_t value) = 0; |

virtual void cmd_read_reg(uint16_t addr) = 0; |

Get register by address or by name, and field by name

static inline auto reg_by_addr(uint16_t addr); |

static inline auto reg_by_name(std::string_view name); |

static inline auto fld_by_name(std::string_view name); |

Get or set register by address, by register_t or by name

inline reg_t get_reg(uint16_t addr) const; |

inline reg_t get_reg(const register_t &reg) const; |

inline reg_t get_reg(std::string_view name) const; |

Common Chip Class

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Get or set register by address, by register_t or by name

inline reg_t get_reg(uint16_t addr) const; |

inline reg_t get_reg(const register_t &reg) const; |

inline reg_t get_reg(std::string_view name) const; |

Write register

inline void write_reg(uint16_t addr, reg_t value); |

Get or set field, field type is templated, can be used bitset<n>.

template<typename fld_t> |

inline fld_t get_fld(const field_t &fld) const; |

template<typename fld_t> |

inline void set_fld(const field_t &fld, fld_t val); |

Generating commands sequence to update field.

void cmd_write_fld(const field_t &fld); |

void cmd_read_fld(const field_t &fld); |

Writing field by field_t and by name

template<typename fld_t> |

inline void write_fld(const field_t &fld, fld_t value); |

Common Chip Class

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Properties are used to modify set of registers.

For example, one can define property "threshold", which will set thresholds of all pixels to some particular value.

Property can be accessed by Property type or by name:

inline std::any& get_prop(const Property& prop) const; |

inline void set_prop(const Property& prop, std::any& value); |

inline void write_prop(const Property& prop, std::any& value); |

inline void write_prop(std::string_view name, std::any& value); |

inline auto& prop_by_name(std::string_view name) const; |

static std::map<std::string_view, const Property*> props; |

static void add_prop(std::string_view name, const Property& prop); |

get_prop method returns the last setted up property.

Reset used to set all registers to default values (or to zero)

virtual void reset(); |

Configure should send configuration sequence to front-end.

virtual void configure(); |

Property

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{ |

"RD53B": { |

"GlobalConfig": { |

"AiRegionRow": 0, |

"AuroraCBSend": 0, |

"AuroraCBWait0": 4095, |

"AuroraCBWait1": 0, |

}, |

"Parameter": { |

"ADCcalPar": [5.894350051879883, 0.1920430064201355, 4990.0], |

"ChipId": 12, |

}, |

"PixelConfig": [{ |

"Col": 0, |

"Enable": [0, 0, 0, 0, ..., 0], |

"Hitbus": [0, 0, 0, 0, ..., 0], |

"InjEn": [0, 0, 0, 0, ..., 0], |

"TDAC": [15, 12, 15, ..., 15], |

}, { |

. . . . |

} |

} |

} |

Global: |

PIX_PORTAL: 0xd5ad |

REGION_COL: 0x00c7 |

REGION_ROW: 0x0000 |

PIX_MODE: 0x0003 |

Pixel: [ |

[0xa5c5, 0xb5cd, 0xb5b5, 0x9da5, ..., 0x8d05], |

[0xad05, 0x15b5, 0x158d, 0x9d95, ..., 0x8d05], |

. . . . . . . . . . . . . . . . . . . . . . , |

[0xad15, 0xadad, 0x9da5, 0xb5c5, ..., 0x8d05], |

] |

ITkPix Config JSON

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Converting field based YARR JSON format to register based YAML format.

Global: |

PIX_PORTAL: 0xd5ad |

REGION_COL: 0x00c7 |

REGION_ROW: 0x0000 |

PIX_MODE: 0x0003 |

. . . . . . . |

Pixel: [ |

[0xa5c5, 0xb5cd, 0xb5b5, 0x9da5, ..., 0x8d05], |

[0xad05, 0x15b5, 0x158d, 0x9d95, ..., 0x8d05], |

. . . . . . . . . . . . . . . . . . . . . . , |

[0xad15, 0xadad, 0x9da5, 0xb5c5, ..., 0x8d05], |

] |

ITkPix Config YAML

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Thank you for yourattention!

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