1 of 38

CSC/EEE120 / Assignment #5-Part 2-FPGA�Simple Security System��Posted 9/22, due 10/2 11:59 pm�Late: 10/3 12:01 am – 10/4 11:59 pm�Game over: after 10/4 11:59 pm: 0 point

​

  • FirstName LastName
  • ____________________________
  • Instruction:

​

  • To edit, you don't need to "request access", do: File/Download/Microsoft PowerPoint(.pptx), save to your local drive; then you can edit your local file.

​

  • File name: Save this file as: 120-assign-05-Part2-FirstName-LastName

​

  • Email report directly to ui.luu@gccaz.edu, (Note: submit this assignment using your "maricopa.edu" email to get direct response for any feedback) (Your personal email address may get filtered into my SPAM folder)

​

  • Scores:
  • (1 point) Correct file type and name with PowerPoint. (pdf file:0 point)
  • (1 point) Name (on this page)
  • (10 points) technical
  • (2 points) submit report on time

2 of 38

Combination Logic / Simple Security

SW2

SW1

SW0

LED3

3 of 38

Open Quartus Prime Lite 18.1

Click New Project Wizard, you will see the next screen

4 of 38

Click next, you will see the next screen

5 of 38

Change the working directory & name of this project as indicated on the next screen

6 of 38

Click next, you will see the next screen

7 of 38

Click Yes, you will see the next screen

8 of 38

Click next, you will see the next screen

9 of 38

Click next, you will see the next screen

10 of 38

Click Board, you will see the next screen

11 of 38

  1. Uncheck Create top-level design file
  2. @Development Kit, make the selection as indicated on the next screen

12 of 38

Click next, you will see the next screen

13 of 38

Click next, you will see the next screen

14 of 38

Click Finish, you will see the next screen

15 of 38

Click File/new, you will see the next screen

16 of 38

Select Verilog HDL File, click OK, you will see the next screen

17 of 38

Type in the Verilog code as indicated on the next screen

18 of 38

Click Save, you will see the next screen

19 of 38

Click Save, you will see the next screen

20 of 38

Click Processing/Start Compilation,

Quartus is compiling, in about 1 minute, you will see the next screen

21 of 38

Click Assignment/Pin Planner, you will see the next screen

22 of 38

Fill in the Location column as indicated on the next screen

23 of 38

  1. Fill in PIN assignments as indicated at the Location column
  2. Select File/Close to close the Pin Planner

Click Processing/Start Compilation,

Quartus is compiling with PIN assignments, in about 1 minute, you will see the next screen

24 of 38

Select Tools/Programmer, you will see the next screen

25 of 38

  1. Make sure your FPGA board USB cable is connected to your PC
  2. Click Hardware Setup, you will see the next screen

26 of 38

Select USB-Blaster, double click on USB-Blaster, you will see the next screen

27 of 38

Confirm that Currently selected hardware is USB-Blaster

Click “Close” to close Hardware Setup,

you will see the Programmer Window on the next screen

28 of 38

Click Start to program the FPGA board, in 1 minute, you will see the next screen

29 of 38

Confirm: Progress: 100% (Successful)

Congratulations! You are now ready to test the FPGA board!

30 of 38

Q3.(1 point) Test case #0 (a=0, b=0, c=0) y=0�(My Screen Shot) (Replaced with your screen shot)

Make photo resolution around 1280x720 to keep PowerPoint file small

a

b

c

y

31 of 38

Q4.(1 point) Test case #1 (S1=0, S2=0, S3=1) y=0�(Your Screen Shot / circuit board / switches / LEDs)

Make photo resolution around 1280x720 to keep PowerPoint file small

32 of 38

Q5.(1 point) Test case #2 (S1=0, S2=1, S3=0) y=0�(Your Screen Shot / circuit board / switches / LEDs)

33 of 38

Q6.(1 point) Test case #3 (S1=0, S2=1, S3=1) y=0�(Your Screen Shot / circuit board / switches / LEDs)

Make photo resolution around 1280x720 to keep PowerPoint file small

34 of 38

Q7.(1 point) Test case #4 (S1=1, S2=0, S3=0) y=0�(Your Screen Shot / circuit board / switches / LEDs)

Make photo resolution around 1280x720 to keep PowerPoint file small

35 of 38

Q8.(1 point) Test case #5 (S1=1, S2=0, S3=1) y=1� (My Screen Shot) (Replaced with your screen shot)

36 of 38

Q9.(1 point) Test case #6 (S1=1, S2=1, S3=0) y=1�(Your Screen Shot / circuit board / switches / LEDs)

Make photo resolution around 1280x720 to keep PowerPoint file small

37 of 38

Q10.(1 point) Test case #7 (S1=1, S2=1, S3=1) y=1�(Your Screen Shot / circuit board / switches / LEDs)

Make photo resolution around 1280x720 to keep PowerPoint file small

38 of 38

Q11.(2 points) Summarize Test Results

SW2

SW1

SW0

LED3