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LArPix and Related Developments in �Scalable Electronics for Noble Liquid Detectors

Dan Dwyer (Berkeley Lab)

CPAD 2026

22 Oct 2026

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3D LArTPC Readout Concept: LArPix

D. Dwyer | LArPix

2

22 Oct. 2026

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Concept:

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- Use grid of charge-collecting

pixels/pads for anode

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- Uniquely identify signals on

each pixel

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- Provides true 3D imaging of

TPC ionization

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Technical Challenges:

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High channel density:

O(100k) pixels/m2 of anode area

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Low noise:

<1000 e- equivalent noise charge (ENC)

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Low power / Cryo-compatible:

Stringent limits on heat load in cryogenic environment, O(10) W/m2

Electronics behavior stable & predictable at LAr temp (87 K)

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Digital multiplexing:

Must reliably transmit O(10k) pixel signals through few wires

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Scalability:

Design and production method must scale to ~107 pixels

to be viable for the DUNE Near Detector

3D Pixel TPC

10k-channel LArPix prototype pixel anode tile

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LArPix Concept

D. Dwyer | LArPix

3

15 Sep. 2026

Approach: Integrating Amplifier with Self-triggered Digitization and Streaming Readout

Front-end amplifier

Self-triggering Discriminator

O(100) keV threshold

SAR Digitizer

Digital Control

Achieve low power: avoid digitization and readout of mostly quiescent data.

Typical hit cycle time:

2.6 us (~4mm drift)

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LArPix and The DUNE Liquid Argon Near Detector (ND-LAr)

D. Dwyer | LArPix

4

22 Oct. 2026

LBNF Beam Pulse Simulation in ND-LAr (May 2025)

(DUNE Work-in-Progress)

Neutrino Pileup:

- LBNF beam intensity results in O(100) interactions visible in ND-LAr per 10μs beam pulse.

(Compare to ionization readout time of ~300μs and scintillation readout time of ~10ns)

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Pileup Mitigations:

- Optically segmented (70 regions) with ~30% optical coverage per segment

- Native 3D pixelated ionization readout → 14M LArPix channels

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Engineering

model of

ND-LAr

detector

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DUNE ND-LAr Prototype: 2x2 Demonstrator

D. Dwyer | LArPix

5

22 Oct. 2026

Description:

- Four mid-scale Pixelated LArTPC modules, 2.4 tons total, >300k pixels

- Includes upstream/downstream steel/scintillator trackers,

repurposed from MINERvA experiment

- Located in underground hall in NuMI neutrino beam at FNAL

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Run #1: First antineutrinos July 8-12, 2024

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- Collected initial ~40k antineutrino interactions in 4.5 days

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Run #2: Tuning and Calibration Studies Oct-Dec, 2025

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- Improved tuning of pixel and scintillation light readout systems

- Performed Calibrations:

- External sources: 22Na, 60Co, 88Y, AmBe, DT Generator

- 220Rn injection

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Run #3: Return of the NuMI neutrino beam Oct. 2026 → 2027

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- Detector refilled/recommissioned over past month

- Neutrino beam returned yesterday (Oct. 21).

- Expect beam through early 2027 (~2 x 1020 protons-on-target)

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Operation of a Modular 3D-Pixelated Liquid Argon Time-Projection Chamber in a Neutrino Beam

Instruments 2026, 10(1), 18

Performance of a Modular Ton-Scale Pixel-Readout Liquid Argon Time Projection Chamber

Instruments 2024, 8(3), 41

Example antineutrino

interactions on argon

imaged in true 3D

during Run #1

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ND-LAr Full-Scale Demonstrator @ Univ. of Bern

D. Dwyer | LArPix

6

22 Oct. 2026

Full-Scale Demonstrator:

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- Built/operated first full-sized ND-LAr TPC module in late 2024

- Used 40 LArPix-v2d tiles, >400k pixels

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Example cosmic ray images

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Developments in System Reliability: Hydra-I/O

D. Dwyer | LArPix

7

22 Oct. 2026

Designed for robust I/O and control architecture

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Difficult to access & repair electronics within large LAr cryostats

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Hydra-I/O prevents tile failure due to single-chip errors

- I/O can occur between any neighboring chips on pixel tile

- Network is built by programming I/O connections between neighboring ASICs

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Successfully exercised with LArPix-v2 chip in 2x2 Demonstrator Program

Upstream configuration commands

Downstream data flow

Example: 5 x 5 Pixel Tile

Four chips have direct off-tile I/O channels

(10 MHz, < 7 m)

Network reconfigured to avoid failed ASIC

Example failed chip.

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Major Lessons from the LArPix-v2 Era

D. Dwyer | LArPix

8

22 Oct. 2026

Cryo-compatibility

- Established a design that meets requirements for cryo-operation (performance at 87 K, heat management to avoid boiling LAr)

- Vast majority of performance quality issues identified at room temp; few new problems emerge at LAr temp

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Reliability

- System design sufficiently reliable to field two multi-ton LArTPCs

- Hydra-I/O successfully mitigates issues from problematic chips and unreliable I/O channels

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Scalability

- Demonstrated a scalable design, fully produced by leveraging standard ASIC and PCB production processes.

- Developed testing program, identifying areas for improvement in advance of production

- Achieved target of O(10) cents per channel for full-system production cost

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Signal Fidelity:

- Refined anode grounding to mitigate microphonic-related noise at tile-to-tile boundaries

- Must consider small (but non-negligible) signals from ionization e- collected by other pixels

- Need 10-bit ADC in order to reduce quantization noise (250 e- least-significant-bit) and capture 250k e- maximum signal.

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LArPix-v3: Honing in on the ND-LAr final design (2025-2026)�

D. Dwyer | LArPix

9

22 Oct. 2026

v3 Strategy:

- Multiple minor iterations in quick succession

to accelerate pace of prototype-based verification

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Increase the LArPix dynamic range:

v3a:

- Replace the 8-bit SAR ADC with a 10-bit SAR

- Differential: Meets power & performance targets in smaller area

- Asynchronous: Faster conversion time than synchronous architecture

- Results: 10-bit ADC successful, with only minor issues with analog-digital handoff

v3b:

- Addressed analog-digital handoff (FIXED)

v3c:

- Add Single-to-Differential (S2D) buffer to match AFE output to ADC input

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Resolve issues with data loss:

v3b: Restructure digital core to simplify internal state machines. -> More significant re-write than originally planned.

- Results: Simplified code, but did not resolve data loss (insufficient validation of significant RTL revision)

v3c: Minor refinements of digital core to fully address data loss.

- Implemented much more significant design verification, code coverage now ~90%; one new subtle bug identified and resolved.

- Completing top-level integration, final verification

Final (v3c) channel structure

← We are here

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LArPix-v3c: Improvements in ASIC Design Verification

D. Dwyer | LArPix

10

22 Oct. 2026

Core Verification: T. Prakash, P. Zarkos, K. Papadopoulou, D. Gnani (LBNL Eng Division); J. Hoff (FNAL)

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- Relies on targeted test design and execution using traditional ASIC design toolkits

- Digital: Constrained-random test bench

- Single-chip and 3x3 multi-chip test bench environments

- Implemented code coverage and functional coverage tracking

- Daily automated regression test suite

- Analog & Mixed Signal:

- 4-corner simulation of gain, BW, phase margin, noise, and power for key amplifier and buffer blocks

- Mixed signal channel simulation with analog and compiled RTL

- Full analog-on-top chip-level simulation

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New FPGA-based Verification: N. Patras (LBNL Computing Division)

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- Implement LArPix digital design on an FPGA

- 3 x 3 network of LArPix ASICs in a single FPGA

- Enables higher-speed execution of subset of LArPix digital tests

- Identified rare deadlock issue in v3c design, and verified fix

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New RTLSwarm Verification: K. Gosine, Y. Mei (UTA)

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- Implements clock-accurate RTL model of LArPix on a CPU, with inter-chip communication parallelized on a CPU cluster

- Enables digital tests of full-sized network of LArPix ASICs (160 chips)

- Independently identified v3b data loss issues, and verified v3c fixes

See CPAD talk by K. Gosine!

Joint with NIFTY program (see upcoming slide)

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Pixelating a DUNE Far Detector

D. Dwyer | LArPix

11

22 Oct. 2026

Goal

Demonstrate LArPix ‘Charge Readout Plane’

compatible with DUNE Far Detector design

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LArPix in CERN NP02 ‘Cold Box’:

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- Install 3m x 3.4m LArPix anode (614k pixels)

in CERN Vertical Drift Cold Box

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- Demonstrate performance and interfaces

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- Target: Collect ~1 week of cosmic ray

test data in Nov. 2026

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Next Step: ProtoDUNE Run-III

- Install LArPix anode in ProtoDUNE,

operate in ~2029

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- Develop MADCAP cryo-data

multiplexer

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- Endorsed by DUNE Collaboration

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DUNE Vertical-Drift Far Detector Design (~15 kton)

ND-LAr: 14M channels

Pixel FD: ~100M channels

Pixel Tile Installation on Composite Frame

(@ CERN Neutrino Platform)

CERN Detector R&D 2 (Liquid Detectors): WP 4.3, Task G2.D2

Composite Frame Assembly (@Univ. of Bern)

and Cryo-test (@ Grenoble)

See CPAD talk

by R. Huang!

MADCAP-v1 Cryo-Multiplexer ASIC

(in collab with INFN M-B)

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Pixel TPC Kits supporting Detector R&D

D. Dwyer | LArPix

12

22 Oct. 2026

Fabricated multiple TPC kits in support of distributed R&D:

- Small kit: 15 cm x 15 cm anode, 10 cm drift, 1600 pixels

- Large kit: 32 cm x 48 cm anode, 48 cm drift, 10k pixels

- Both include complete readout system

- Requires: Cryogenics system with sufficient e- lifetime

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Recent Applications:

- Validation tests of LArPix-v3 ASIC (@ Berkeley Lab)

- Tests of photosensitive dopants (@ Fermilab)

- Development of Radon injection for calibration (@ CSU)

- Test of UV-laser calibration (@SLAC)

- Prototyping of anode shield plane for signal shaping

(@ Berkeley Lab)

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Large (10k-pixel) TPC Kit

Small (1.6k-pixel) TPC Kit

Large Kit

installed in

test cryostat

@ LBNL

CERN DRD2:

WP 4.3, Task G1.D3

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TPC Kit Example: Anode Shield R&D

D. Dwyer | LArPix

13

22 Oct. 2026

Prototype Shield Plane

(from HKUST)

on 1.6k-pixel Tile

Data shows expected sharpening of time profile of integral charge on pixel from muon tracks

No Shield

With Shield

Goal:

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Reduce signal induction from e- drift to very near field (few-mm)

- Significant pre-triggering observed during very large particle showers

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Details:

- Add copper-clad & perforated PCB in front of anode tile

- Bias to ~-1 kV to ensure ionization e- collected on anode

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Key Challenges:

- HV discharge risk, leakage currents, scalable manufacturing

Pretriggering during

large cosmic shower in

2x2 Demonstrator

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TPC Kit Example: Radon Injection R&D

D. Dwyer | LArPix

14

22 Oct. 2026

Purpose:

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- Facilitate full-volume detector calibration using 220Rn daughters

- Longest-lived unstable daughter: 212Pb, t½ = 10.6 hours

- Effort driven by Mooney group at CSU

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Process:

- Developed and validated the injection system using large TPC kit at CSU

- Successfully used the injection system during Run #2 of the 2x2 Demonstrator

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DUNE Work-in-progress

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LArPix Variants: LightPix

D. Dwyer | LArPix

15

22 Oct. 2026

LArPix Platform:

Provides scalable readout electronics system

for detectors with O(10) to O(107) channels

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LightPix:

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- Highly-granular cryo-compatible scalable SiPM readout

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- Designed for high-channel counts, low occupancy

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- LightPix-v3: captures arrival time with sub-ns precision

and integral intensity measurement (over ~1 us)

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- Collaborating with MIT and Univ. of Bern for testing

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HPK SiPM Dark Count Spectrum

vs Bias Voltage

TDC resolution

and linearity < 1 ns

CERN DRD2: WP 4.3, Task G2.D4

LIghtPix-v3

Channel Diagram

LIghtPix-v3 ASIC

GHe neutron detector with

300-channel LightPix Readout

(McKinsey Group, UC-Berkeley)

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LArPix Variants: QPix and NIFTY

D. Dwyer | LArPix

16

22 Oct. 2026

LArPix Platform:

Provides scalable readout electronics system

for detectors with O(10) to O(107) channels

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QPix:

- Charge-replenishment based front-end, in collab with

QPix team (UTA, et. al.)

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- Exploring integration of QPix front-end into LArPix system

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NIFTY:

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- Hardware AI: Network Intelligence for Fault Tolerance

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- Exploring novel techniques for dynamic data routing

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- Simulated expected data loads/profiles

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- Explored candidate algorithms for

adaptive data routing

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- ASIC design launched, targeting prototype

later this year

Simulated data flow

through Hydra-I/O

network of LArPix chips

CERN DRD2: WP 1, Task G1.D1

Simulated peak

loads on LArPix

memory buffers

during DUNE

beam pulse.

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QPix charge-replenishment

front-end concep

QPix pulse-train signal reconstruction

See CPAD talks by R. Carney, T. Heim,

and posters by C. Ceravolo, D. Fellers!

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LArPix Development Team

D. Dwyer | LArPix

17

22 Oct. 2026

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Summary

D. Dwyer | LArPix

18

22 Oct. 2026

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LArPix:

- True 3D pixelated charge readout for LArTPCs

- Low-noise, low-power, cryogenic-compatible

- Self-triggering:

- 100% live, independent of light system

- Inherently low data volumes (no signal from inactive pixels)

- Suitable for rare, low-energy physics searches

- Scalable anode design leverages commercial fabrication

- ~1 million channels deployed in two multi-ton prototypes

- Finalizing the design for use in the DUNE Near Detector

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Related Efforts:

- DUNE Phase-II:

- Exploring adaptation for use in future DUNE Far Detector

- 600k-pixel prototype to operate at CERN this summer

- Pixel LArTPC Kits: Supporting generic detector R&D

- LightPix: Scalable cryo-compatible readout for SiPMs

- NIFTY: Adaptive data routing for improved reliability

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Potential technologies for

future high-granularity detectors

LArPix-v3 ASIC

LightPix-v3 ASIC

GHe detector

w/LightPix

Readout

10k-pixel tile

10k-pixel

TPC Kit

Antineutrinos in true 3D

Pixel Detector R&D

for DUNE Phase II