SPECTRUM Questionnaire

Quantum computing is chasing one of the biggest performance boost in the history of technology, enabling unprecedented computational capabilities for a multitude of applications. However, the wide-spread of the QC technologies is hindered by several factors, most of them relating to the complexity and cost of the QC architecture.

The EU-funded project Spectrum (GA N° 101057977) is developing a novel technology aimed to create a multi-port superfast switch with working temperature 10 mK and no heat dissipation, precisely to solve these challenging problems. QueSt reduces the volume of current wiring while increasing the thermal efficiency and scalability of quantum computers.

This survey is intended to gather information regarding the current state of the art of quantum computer technology and architectures. The objective is to highlight the possible application of the technology being developed by the Spectrum Consortium, and develop in line with the needs of users. The survey is composed of two sections, the first regarding the state-of-the-art and the second focused on the switching technology requirements. The full survey usually takes about 10 minutes.

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What is your activity?
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What quantum technology are you involved with?
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How many RF and DC cables do you use to control each qubit? How many of these are made of superconductive material?
Have you implemented a multiplexing scheme to reduce the number of cables in the cryostat?

Do you experience downtimes (interference on the operation of Qubits) related to the use of cold RF switches or other cold electronics (e.g., due thermal photon poisoning)?

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What is the bandwidth that you use to control your quantum processor/qubits?

Do you use off the shelf components or build your own?
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In your opinion, are there one or more architectures that can be considered standard for quantum computers becoming established at the engineering level?
Which kind of packaging technologies is most adopted for electronic components (switch, transistors, amplifiers, logic gates, etc.) to be installed inside a cryostat?

What is the connector standard that you use in your setup?

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Can you run the algorithms you use in your applications, addressing the qubits sequentially?

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If in the previous question the answer was no, is it related to the fundamental reasons or is it related to the time to switch between qubits?
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