EE6361-Advanced Topics in VLSI Class Quiz
Redundancy
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Q1. In a certain memory array with 1024 word-lines, the MSB of the row address is stuck-at-1 at the input to the decoder. How many unique locations can be accessed?
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Q2. In the above question, will the following test pattern detect this fault? ⇑ {w0, r0, w1, r1}
Q3. Will the following test pattern detect the fault? ⇑ {w0} ,⇑{ r0, w1, r1}
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Q4. Is this memory fixable? What is the best redundancy allocation you can do with this bit fail map?
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